Full-Duplex Capacitive Isolator for EMI-Resistant Data Transfer
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Solution Overview
Problem
Existing power converters face challenges in achieving efficient and compact galvanic isolation with minimal interference, particularly due to high-speed switching in GaN or SiC-based switches causing substantial ringing and EMI, and the need for separate channels for forward and feedback data transmission increases costs and die size.
Innovation Solution
A full duplex digital isolator using differential capacitors for both forward and feedback channels, allowing bidirectional data transmission with shared isolation capacitors, and incorporating dV/dt detection to manage high-frequency events, reducing EMI and parasitic elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate channels are used for forward and feedback data transmission, then data isolation reliability is improved, but device complexity and die size increase
Solution Approach 1:
The patent combines forward and feedback data transmission into a single isolated channel by using capacitive coupling to transfer both directions of data through shared isolation capacitors. This merging approach maintains galvanic isolation reliability while reducing the number of separate transmission channels needed, thereby decreasing device complexity and die size.
Solution Approach 2:
The isolation capacitors serve multiple functions: they provide galvanic isolation, enable forward data transmission, and facilitate feedback data transmission. This multi-functionality allows a single channel to handle bidirectional communication, eliminating the need for separate dedicated channels for each direction and reducing overall system complexity.
2Productivity
If GaN or SiC-based switches are used for high-speed switching, then power conversion efficiency is improved, but ringing and EMI increase
Solution Approach 1:
The patent acknowledges that GaN or SiC switches generate high dV/dt events that cause ringing and EMI, but converts this challenge into an opportunity by implementing dV/dt detection circuitry. The detection system monitors these high-frequency events and uses them to trigger appropriate responses, such as adjusting isolation capacitor coupling or activating EMI filtering, thereby managing the harmful effects while maintaining the efficiency benefits of high-speed switching.
3Device complexity
If shared isolation capacitors are used for bidirectional transmission, then die size and cost are reduced, but interference management becomes more difficult
Solution Approach 1:
The patent implements feedback mechanisms where the system continuously monitors the isolation channel for interference and signal quality. When interference is detected in the shared capacitive coupling channel, the feedback system adjusts transmission parameters, activates filtering, or modifies capacitor coupling to maintain reliable bidirectional communication while managing the increased interference risk from sharing the channel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively handles fast dV/dt events, reduces ringing and EMI, and minimizes die size and cost by using shared capacitors, ensuring reliable data transfer with reduced interference.
Implementation Method 1
Capacitive isolation can be used in galvanic isolation, to isolate high voltages from one another or to isolate low voltage command circuits to high voltage power circuits
Implementation Method 2
incorporating dV/dt detection to manage high-frequency events
Data Source
AI summary
A circuit. The circuit includes a first transmitter circuit having a first input terminal arranged to receive a first input data and a first node arranged to transmit a first intermediate data corresponding to the first input data, a first receiver circuit including a second node arranged to receive the first intermediate data and a first output terminal arranged to produce a first output data corresponding to the first input data, a second transmitter circuit including a second input terminal arranged to receive a second input data and the second node that is further arranged to transmit a second intermediate data corresponding to the second input data; and a second receiver circuit including the first node and a second output terminal, the first node further arranged to receive the second intermediate data, and the second output terminal arranged to produce a second output data corresponding to the second input data.


