Full Duplex Edge Timing Signal Communication
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Solution Overview
Problem
In safety-relevant microprocessor applications, existing communication systems require multiple communication paths and external clock signals, which complicate design and slow down communication, potentially leading to malfunction and failure in critical systems.
Innovation Solution
The use of edge timing in a common signal allows for bidirectional and full-duplex communication between a master and slave device using a single communication line without an external clock, simplifying the system design and enabling fast and reliable data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple communication paths are used to ensure reliable communication in safety-relevant applications, then communication reliability is improved, but device complexity and the number of pins required increase
Solution Approach 1:
The patent combines bidirectional communication and clock synchronization into a single communication path. The master device generates a clock signal that is transmitted to the slave device, while data communication occurs in both directions over the same line, eliminating the need for separate communication paths and reducing device complexity while maintaining reliability
Solution Approach 2:
The communication line serves multiple functions simultaneously: it transmits clock signals from master to slave, carries data from master to slave, and enables slave status feedback to master, making the single line universal and multi-functional rather than requiring dedicated lines for each purpose
2Reliability
If external clock signals are used for synchronization, then communication reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts the clock signal generation function from an external source and integrates it into the master device itself. The master device generates the clock signal internally and transmits it to the slave device, eliminating the need for external clock circuits and reducing device complexity while maintaining synchronization reliability
Solution Approach 2:
The master device serves itself by generating its own clock signal and providing it to the slave device, which then uses this clock for synchronization. This self-service approach eliminates external clock dependencies and simplifies the overall system while ensuring reliable timing
3Reliability
If multiple communication lines are used for bidirectional communication, then communication reliability is improved, but the number of pins required increases
Solution Approach 1:
The patent merges transmit and receive functions into a single communication line. The slave device detects edges on this line to determine timing information, allowing bidirectional communication without requiring separate transmit and receive lines, thereby reducing pin count while maintaining full communication capability
Data Source
AI summary
Systems, methods, and circuitries are provided to perform full duplex communication using edge timing in a common signal. In one example, a method for a slave device includes receiving a common signal resulting from combination of a slave signal transmitted by the slave device on a signal line and a master signal transmitted by the master device on the signal line. The common signal includes a series of signal periods having a first edge and a second edge. The method includes, in a period of the common signal: determining slave information to be communicated; selecting a second edge timing corresponding to the slave information; detecting the first edge in the common signal; transmitting a slave signal having a first slave edge at the second edge timing after the first edge; and determining master information based on a detected level of the common signal at a check point of the signal period.