Full-Duplex Serial Link Clock Synchronization for Jitter Reduction
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Solution Overview
Problem
Existing communication methods between systems, particularly in the context of electronic switches in hybrid or electric vehicles, face challenges in ensuring voltage isolation, minimizing wire count, meeting timing constraints, handling data with different priority levels, and mitigating jitter-induced delays, while allowing for flexible component choice and efficient data exchange.
Innovation Solution
A full duplex synchronous serial link method that synchronizes data exchange between systems using a clock signal, allowing for simultaneous two-way data transmission with reduced wire count, ensuring timely processing, and supporting various priority levels, utilizing a Serial Peripheral Interface (SPI) protocol and potentially including galvanic isolation, with bit rates exceeding 5 Mbits/s to meet the requirements of high-frequency electronic switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a full duplex synchronous serial link is used, then the number of wires is reduced and data transmission efficiency is improved, but voltage isolation between systems becomes more difficult to guarantee
Solution Approach 1:
The patent introduces an intermediary isolation mechanism (optical isolator or transformer) between the two systems that are connected via the full-duplex serial link. This intermediary device transfers signals while maintaining galvanic isolation, thus resolving the contradiction between reducing wire count and maintaining voltage isolation reliability.
2Loss of time
If data transmission time is reduced to meet processing deadlines, then real-time processing is improved, but data accuracy may be compromised due to jitter
Solution Approach 1:
The patent employs periodic synchronization using a clock signal that is transmitted along with the data. This periodic action provides regular timing references that allow receiving systems to compensate for jitter and maintain accurate data timing, thus resolving the contradiction between fast transmission and data accuracy.
Solution Approach 2:
The patent implements feedback mechanisms where timing information and synchronization data are continuously exchanged between systems. This feedback allows dynamic adjustment of timing parameters to compensate for jitter, maintaining data accuracy while enabling fast transmission.
3Adaptability or versatility
If the communication link is made more robust to handle various priorities, then data handling capability is improved, but the device complexity increases
Solution Approach 1:
The patent segments data into different priority levels or channels, allowing simultaneous transmission of multiple data types with different priorities. This segmentation enables robust multi-priority handling while keeping the underlying physical link relatively simple, thus resolving the contradiction between adaptability and complexity.
Data Source
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AI summary
The invention relates to a periodic communication method between at least one first system (2) and at least one second system (3) by means of a full-duplex synchronous serial link (4), wherein, during a communication period, data are exchanged between the first system (2) and the second system (3), including: at least one message from the first system (2) to the second system (3), at least one message from the second system (3) to the first system (2) and a clock signal, the clock signal being routed by the link (4) over a time interval, the amplitude of which is less than the communication period, the message from the first system (2) to the second system (3) and the message from the second system (3) to the first system (2) both being routed by the link (4) over said time interval.