Full-Duplex Transceiver Echo Cancellation Feedback

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Solution Overview

Problem

Full-duplex transceivers using single-ended signaling face challenges in suppressing echo noise and maintaining power integrity while allowing concurrent signal transmission and reception over a shared medium.

Innovation Solution

A full-duplex transceiver circuit design that includes a line driver outputting complementary currents to nodes, resistors for impedance matching and shunting, capacitors for coupling, an operational amplifier with feedback network, and a transmission line, ensuring balanced loading and effective echo cancellation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If single-ended signaling is used in a full-duplex transceiver, then device complexity is reduced, but echo noise suppression becomes more difficult

Engineering Contradiction:
Improvesignaling complexityVSAvoidecho noise
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an echo canceller as an intermediary component between the transmitter and receiver. This echo canceller uses a feedback mechanism to generate an echo signal that is subtracted from the received signal, thereby removing the harmful echo noise while maintaining the simplicity of single-ended signaling. The feedback path acts as a mediator that compensates for the echo without requiring complex differential signaling.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If echo cancellation is implemented in a full-duplex transceiver, then echo noise is suppressed, but power integrity may be compromised

Engineering Contradiction:
Improveecho noise suppressionVSAvoidpower integrity
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent employs a feedback mechanism where the output of the echo canceller is fed back to the input of the operational amplifier. This feedback path allows the system to continuously adjust and maintain power integrity while suppressing echo noise. The feedback ensures that the DC operation point remains stable and that power is properly managed throughout the signal processing chain, preventing power degradation that would otherwise occur with echo cancellation.

Inventive Principle:
Principle #23Feedback

3Object-affected harmful factors

If conventional echo reduction circuits are used, then echo noise is reduced, but freedom in determining DC operation point is limited

Engineering Contradiction:
Improveecho noise reductionVSAvoidDC operation point flexibility
Core Design Contradiction:
Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic feedback mechanism that allows the DC operation point to be freely adjusted. The feedback path from the echo canceller output to the operational amplifier input enables real-time adjustment of operating parameters. This dynamic configuration provides design freedom in determining the DC operation point while maintaining effective echo noise reduction, as the system can adapt to different operating conditions without sacrificing either goal.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9473204B2Full-duplex transceiver circuit and method thereof
Publication Date: 2016.10.18 REALTEK SEMICON CORP
  • US9473204B2 patent drawing
  • US9473204B2 patent drawing
  • US9473204B2 patent drawing

AI summary

A full-duplex transceiver circuit comprises: a line driver configured to output a first current to a first node and a second current to a second node; a first resistor configured to shunt the first node to ground; a second resistor configured to shunt the second node to ground; a first capacitor configured to couple the first node to a third node; a second capacitor configured to couple the second node to the third node; an operational amplifier configured to receive a first input from a reference node and a second input from the third node and output an output voltage at a fourth node; a feedback network comprising a parallel connection of a third resistor and a third capacitor configured to provide a feedback from the fourth node to the third node; and a transmission line of a characteristic impedance configured to couple the first node to a remote transceiver.