Full Spectrum Modulator Using Polyphase Filter Bank

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Solution Overview

Problem

Existing modulators for DOCSIS/CATV downstream signals are inefficient in terms of multiply operations per channel, fail to meet specifications for adjacent channel, wideband noise, and carrier suppression, and cannot support mixed QAM modes or harmonically related carrier frequency plans, making them unsuitable for dense edge QAMs and Converged Multiservice Access Platforms.

Innovation Solution

A full spectrum DOCSIS/CATV downstream modulator implemented in a single FPGA or ASIC using a single D/A converter, employing an FFT-based polyphase channelizer approach with IDFT, DCT, and DST computations, and separating pulse shaping from channelization filtering to meet the required specifications and reduce resource constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If an older modulator architecture is used, then the device complexity is reduced, but the multiply operations per channel increase and efficiency decreases

Engineering Contradiction:
Improvemodulator architecture complexityVSAvoidmultiply operations per channel efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The modulator architecture is segmented into distinct functional blocks including parallel channel processing paths, each with dedicated filter and interpolator units, an IDFT processor, and a polyphase filter bank. This segmentation allows independent optimization of each segment, reducing overall complexity while maintaining high efficiency through parallel processing of multiple channels simultaneously.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If a conventional modulator architecture is used, then ease of manufacture is improved, but the ability to meet adjacent channel and carrier suppression specifications deteriorates

Engineering Contradiction:
Improvemodulator implementation easeVSAvoidadjacent channel and carrier suppression specification compliance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Pulse shaping and channelization filtering functions are merged into a unified polyphase filter bank structure that processes multiple channels simultaneously. This merging ensures consistent application of filtering criteria across all channels, guaranteeing compliance with adjacent channel and carrier suppression specifications while simplifying the manufacturing process through a single integrated filtering stage.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If a standard modulator design is used, then device compatibility is improved, but the support for mixed QAM modes and harmonically related carrier frequency plans deteriorates

Engineering Contradiction:
Improvemixed QAM modes and HRC frequency plan supportVSAvoidmodulator design flexibility
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The modulator incorporates dynamically reconfigurable channel processing paths that can be programmed to support different QAM modes (64-QAM, 256-QAM, etc.) and frequency plans (standard or harmonically related carriers). The IDFT processor and polyphase filter bank parameters can be dynamically adjusted to accommodate varying service requirements, providing adaptability without requiring multiple dedicated hardware designs.

Inventive Principle:
Principle #15Dynamics

4Quantity of substance

If parallel channel processing is implemented, then the number of channels increases, but the resource requirements and device complexity increase

Engineering Contradiction:
Improvenumber of QAM channelsVSAvoidFPGA or ASIC resource requirements
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The polyphase filter bank is designed as a universal resource that can process multiple channels simultaneously through efficient parallel computation. Each filter bank unit handles both pulse shaping and channelization functions for multiple channels, reducing the need for separate filtering hardware for each channel. The IDFT processor similarly provides multi-functional capability by handling frequency transformation for all channels in a single operational pass.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8610514B2Full spectrum modulator for digital television signals
Publication Date: 2013.12.17 GATESAIR INC
  • US8610514B2 patent drawing
  • US8610514B2 patent drawing
  • US8610514B2 patent drawing

AI summary

A full spectrum modulator processes a plurality of CATV channels from separate paths. Each path has (i) a first filter for pulse shaping an input channel signal and upsampling a channel frequency thereof, (ii) an interpolator for interpolating the output of the first filter to a common sample rate, and (iii) a decimator for centering the output of the interpolator on a predetermined channel bandwidth. An IDFT processor receives channel signal outputs from the decimators. A polyphase filter bank receives IDFT processed parallel channel signals from the IDFT processor. A commutator converts the processed parallel channel signals from the polyphase filter bank to a single stream of data. A second filter upsamples the single stream of data to a fixed output sampling rate and low pass filters alias signals therefrom. Both standard and harmonically related carrier CATV channel frequency plans are accommodated.