Full-T Cross Apparatus Reducing Chip Size via Segmented Output Modules
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Solution Overview
Problem
Current full-T cross implementations using RAM or MUXs lead to increased chip size, costs, and power consumption due to the need for extensive on-chip RAM and complex wiring, respectively.
Innovation Solution
A full-T cross apparatus and method that employs multiple output modules with data storage and control modules to buffer and re-route service data across input and output channels based on a preset relation, reducing chip size and power consumption by optimizing data storage and routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If RAM is used to implement full-T cross, then cross capacity is improved, but chip size increases
Solution Approach 1:
The patent segments the full-T cross function into multiple output modules, each handling specific output channels. Each output module contains dedicated data storage modules for different input channels, creating a distributed architecture that reduces the need for large centralized RAM while maintaining full cross capacity.
Solution Approach 2:
The patent introduces a new dimensional organization by creating a two-dimensional array of data storage modules where rows correspond to input channels and columns correspond to output channels. This spatial organization allows efficient data routing without requiring excessive on-chip RAM.
2Adaptability or versatility
If MUX is used to implement full-T cross, then cross capacity is improved, but device complexity increases
Solution Approach 1:
The patent divides the cross-connect function into multiple independent output modules, each with its own data storage modules. This segmentation reduces the complexity of interconnections compared to a monolithic MUX-based approach, as each module has localized wiring requirements.
Solution Approach 2:
The patent introduces data storage modules as intermediary elements between input channels and output channels. These storage modules act as buffers that simplify the routing logic, eliminating the need for complex MUX wiring while maintaining full cross-connect capability.
3Adaptability or versatility
If on-chip RAM is increased to improve cross capacity, then adaptability is improved, but power consumption increases
Solution Approach 1:
The patent segments the storage function into multiple small data storage modules distributed across output modules, rather than using one large centralized RAM. This segmentation allows for more efficient memory access patterns and reduced power consumption while maintaining the same cross capacity.
Data Source
AI summary
A full-T cross apparatus and method are provided. The full-T cross apparatus includes an input module, which includes multiple input channels; and multiple output modules, each of which includes an output channel, an output control module, and multiple data storage modules. Each of the multiple data storage modules is corresponding to each of the multiple input channels of the input module. The multiple output modules are configured to receive service data from the multiple input channels according to the output channels corresponding to the service data, and send the service data according to output time slots corresponding to the service data. In this way, the chip size is reduced to some extent, and further, the costs and power consumption of the chip are reduced.


