Fully Depleted Region Reduces Poly-Substrate Parasitic Capacitance
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Solution Overview
Problem
Conventional methods for reducing parasitic capacitance between poly-silicon layers and substrates in semiconductor devices, such as increasing the thickness of the shallow trench isolation layer, limit device density and increase costs, particularly for high impedance poly-silicon devices.
Innovation Solution
The introduction of a fully depleted region beneath electronic devices, formed by strategically positioning doped regions with opposite polarity dopants, creates an additional parasitic capacitance that is coupled in series with the existing capacitance, reducing the overall parasitic capacitance experienced by the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the thickness of the shallow trench isolation layer is increased to reduce parasitic capacitance, then the parasitic capacitance between poly-silicon layer and substrate is reduced, but the device density is limited and manufacturing cost increases
Solution Approach 1:
The patent applies local quality by creating a fully depleted region specifically beneath the poly-silicon device rather than uniformly increasing isolation layer thickness across the entire substrate. This localized depletion region reduces parasitic capacitance only where needed under the device, while maintaining normal substrate conditions elsewhere, thus preserving device density and avoiding increased manufacturing costs associated with global isolation layer thickening.
Solution Approach 2:
The patent changes the electrical parameter of the substrate region by creating a fully depleted region with modified doping characteristics. By adjusting the doping concentration and creating a depletion zone beneath the poly-silicon device, the electrical properties of the substrate are locally modified to reduce parasitic capacitance without requiring physical thickening of isolation layers, thereby maintaining device density and manufacturing efficiency.
2Object-affected harmful factors
If the thickness of the shallow trench isolation layer is increased to reduce parasitic capacitance, then the parasitic capacitance between poly-silicon layer and substrate is reduced, but the manufacturing cost increases
Solution Approach 1:
The patent implements local quality by forming a fully depleted region only beneath specific poly-silicon devices that require parasitic capacitance reduction. This targeted approach avoids the need to increase shallow trench isolation layer thickness across the entire wafer, thereby eliminating the associated increases in material usage, processing time, and manufacturing cost while still achieving the desired electrical performance improvement.
Solution Approach 2:
The patent uses existing doping processes and structures to create the fully depleted region, essentially copying proven manufacturing techniques rather than introducing entirely new process steps. By utilizing standard doping and isolation formation processes to achieve the depleted region, the manufacturing cost is kept comparable to conventional approaches while achieving superior parasitic capacitance reduction.
3Object-affected harmful factors
If a fully depleted region is created beneath the electronic device, then parasitic capacitance is reduced, but additional doped regions must be positioned strategically to form the depletion zone
Solution Approach 1:
The patent merges the formation of the fully depleted region with existing isolation structures and doping processes. By integrating the depletion region creation into the standard isolation formation sequence, the additional doped regions are positioned and formed using the same process steps as other device structures, thereby reducing the overall process complexity despite the added functional requirement.
Solution Approach 2:
The patent introduces an intermediary shallow trench isolation structure that facilitates the formation of the fully depleted region. This intermediary structure serves as a template and barrier during doping processes, enabling precise positioning of the doped regions that create the depletion zone without requiring complex direct patterning, thus simplifying the overall device fabrication complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance by up to 70% compared to conventional structures, particularly benefiting high impedance poly-silicon-based devices and microelectromechanical system (MEMS) microphones, while maintaining device performance and density.
Implementation Method 1
Parasitic capacitance exists between such layers, and it is particularly important to control the parasitic capacitance that exists between the poly-silicon layer and layers beneath the poly-silicon layer, including the substrate.
Implementation Method 2
a depletion region in the substrate region formed by lateral interaction between the second doping of the doped region and the first doping of the substrate region
Data Source
AI summary
A fully depleted region may be used to reduce poly-to-substrate parasitic capacitance in an electronic device with poly-silicon layer. When the fully depleted region is located at least partially beneath the electronic device, an additional parasitic capacitance is formed between the fully depleted region and the substrate region. This additional parasitic capacitance is coupled in series with a first parasitic capacitance between a poly-silicon layer of the electronic device and the doped region. The series combination of the first parasitic capacitance and the additional parasitic capacitance results in an overall reduction of parasitic capacitance experience by an electronic device. The structure may include two doped regions on sides of the electronic device to form a fully depleted region based on lateral interaction of dopant in the doped regions and the substrate region.