Fully Differential Amplifier Common-Mode and Offset Control

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Solution Overview

Problem

Differential amplifiers face challenges in maintaining a well-defined common mode output voltage and reducing output offset voltage due to process variations, which degrade amplifier gain and dynamic range, especially at low supply voltages required for energy-efficient portable devices.

Innovation Solution

A fully differential amplifier circuit with feedback loops that adjust output signals to a common mode voltage level and reduce offset voltages in continuous time, using a low pass filter with dual bandwidths to filter out differential components and maintain common mode integrity, allowing transistors to operate in subthreshold regions for low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the supply voltage is reduced to lower power consumption, then energy efficiency is improved, but the useful dynamic input range and output range are reduced

Engineering Contradiction:
Improvepower consumptionVSAvoiddynamic input range and output range
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The feedback system is segmented into two independent loops: a common mode feedback loop for controlling the common mode output voltage level, and a differential mode feedback loop for reducing output offset voltage. This segmentation allows each loop to be optimized independently, enabling the amplifier to maintain full dynamic range while operating at low supply voltages for reduced power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dual feedback loops that continuously monitor and adjust the output signals. The common mode feedback loop senses the common mode output voltage and adjusts it to the desired level, while the differential mode feedback loop detects and reduces output offset voltage caused by device mismatches. This feedback mechanism ensures stable operation and maintains full dynamic range even at low supply voltages.

Inventive Principle:
Principle #23Feedback

2Ease of manufacture

If process variations are present in fabrication, then manufacturing cost is reduced, but output offset voltage increases and amplifier gain degrades

Engineering Contradiction:
Improvefabrication processVSAvoidoutput offset voltage and amplifier gain
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The differential mode feedback loop continuously senses the output offset voltage caused by process variations and applies corrective feedback to reduce it. This automatic correction mechanism compensates for mismatches in NMOS and PMOS devices without requiring precision manufacturing, thereby maintaining amplifier gain and reliability despite standard fabrication process variations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The amplifier circuit performs self-correction of output offset voltage through the differential mode feedback loop. The circuit automatically detects offset voltages caused by device mismatches and adjusts the output signals to eliminate the offset, enabling the amplifier to compensate for its own manufacturing imperfections without external intervention.

Inventive Principle:
Principle #25Self-service

3Stability of the object's composition

If a common mode feedback circuit is used to correct common mode output voltage, then common mode level stability is improved, but output offset voltage cannot be corrected

Engineering Contradiction:
Improvecommon mode output voltage levelVSAvoidoutput offset voltage
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The feedback system is divided into two independent loops with distinct functions: the common mode feedback loop exclusively controls the common mode output voltage level, while the differential mode feedback loop exclusively reduces output offset voltage. This functional segmentation allows each loop to optimize its specific task without interfering with the other, achieving both common mode stability and offset correction simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

While segmented into two loops, the overall feedback system provides universal correction capability for both common mode voltage level and differential mode offset voltage. The dual-loop architecture enables a single feedback system to perform multiple correction functions that would be impossible with a single-loop design.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Use of energy by moving object

If transistors operate in subthreshold regions to reduce power consumption, then energy efficiency is improved, but device matching becomes more sensitive to process variations

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice matching
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The differential mode feedback loop compensates for increased sensitivity to process variations by continuously sensing output offset voltages and applying corrective feedback. This active compensation mechanism allows transistors to operate in the subthreshold region for low power consumption while the feedback system corrects the resulting mismatches, maintaining overall amplifier performance.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7683717B2Fully differential amplifier with continuous-time offset reduction
Publication Date: 2010.03.23 ZEST LABS INC
  • US7683717B2 patent drawing
  • US7683717B2 patent drawing
  • US7683717B2 patent drawing

AI summary

Fully differential amplifier circuits are described herein that set the common mode voltage as well as reduce the output offset voltage (offset cancellation). A circuit according to one embodiment includes a first section for generating first and second output signals on first and second outputs from first and second input signals, a first negative feedback loop coupled to the first section, and a second negative feedback loop coupled to the first section. A second section controls the first negative feedback loop for adjusting the first output signal towards a common mode voltage level, and for reducing an offset voltage of the first output signal in different loop bandwidths. A third section controls the second negative feedback loop for adjusting the second output signal towards the common mode voltage level, and for reducing an offset voltage of the second output signal in different loop bandwidths.