Function Control Circuitry for Target Memory Address Determination
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Solution Overview
Problem
Current data processing systems face performance limitations and high power consumption due to the time it takes for memory protection units to determine target memory addresses, which affects data access efficiency and circuit area.
Innovation Solution
A data processing apparatus with function control circuitry and address generation circuitry that determines and outputs the target memory address within the same processing cycle, improving data access accuracy and reducing power consumption by directly addressing the target memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory protection unit or memory management logic is used to control memory access, then memory access control is achieved, but data access time increases and performance is limited
Solution Approach 1:
The patent extracts the target memory determination function from the traditional MPU/memory management logic and implements it directly in the data processing apparatus. By recording the correspondence between function addresses and target memories in advance, the system eliminates the need for complex runtime address determination, thereby reducing data access time while maintaining memory access control.
Solution Approach 2:
The patent applies preliminary action by pre-recording the correspondence between function addresses and target memories in the function control circuitry before actual data access occurs. This advance preparation allows the system to quickly determine the target memory during data access without performing complex calculations or lookups, thus resolving the time-performance contradiction.
2Adaptability or versatility
If multiple memories are accessed to determine the target memory address, then data access flexibility is improved, but power consumption increases
Solution Approach 1:
The patent extracts the target memory identification function from multiple memory access operations and implements it through a dedicated function control circuitry that uses pre-recorded address mappings. This approach maintains data access flexibility by supporting multiple memory types while significantly reducing power consumption by avoiding the need to actually access multiple memories to determine the target.
3Adaptability or versatility
If traditional memory address determination methods are used, then system compatibility is maintained, but circuit area increases
Solution Approach 1:
The patent uses a simplified copying approach by recording only the essential correspondence between function addresses and target memories in the function control circuitry, rather than implementing the full complex logic of traditional MPU or memory management units. This reduces circuit area while maintaining system compatibility through the address generation circuitry that outputs addresses in the standard format.
Data Source
AI summary
A data processing apparatus for accessing a plurality of memories is provided. The data processing apparatus includes a function control circuitry and an address generation circuitry. The function control circuitry is utilized to record a first memory address where a first function is implemented after the first function is implemented and to determine which one of the plurality of memories is a target memory according to the first memory address. The address generation circuitry is utilized to output the first memory address to the target memory. In addition, the function control circuitry is configured to determine the target memory in the same processing cycle in which the address generation circuitry is configured to output the first memory address.