Functional-Input Sequential Circuit With Shorter Setup Path
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Solution Overview
Problem
Functional-input sequential circuits face increased setup time due to series combinations of transistors, leading to incorrect data capture and errors, especially in networks with varying insertion delays and clock skewing issues.
Innovation Solution
The implementation of a functional-input sequential circuit with a single-input transmission circuit and a combinational logic circuit that controls the gating, where non-critical signals are removed from the critical path, reducing setup time and enhancing performance by eliminating the series stack of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If series combination of transistors is used to implement logical functions, then the logical function can be achieved, but the setup time increases
Solution Approach 1:
The patent segments the input signals into two groups: critical path signals that directly control the transmission gate, and non-critical signals that are processed through combinational logic to generate control signals. This segmentation removes the series stack of transistors from the critical path, reducing setup time while maintaining the logical function through coordinated control of the transmission gate.
Solution Approach 2:
The patent extracts non-critical signals from the critical path and processes them separately through combinational logic circuits. By taking out these non-critical signals and generating their control effects through logic circuits rather than series transistor stacks, the setup time for critical signals is reduced while the overall logical function is preserved.
2Reliability
If clock skewing is applied to compensate for insertion delays, then data capture accuracy can be improved, but the clock distribution complexity increases
Solution Approach 1:
The patent applies local quality by providing different control mechanisms to different sequential elements: critical path signals directly control transmission gates for immediate response, while non-critical signals are processed through combinational logic. This localized differentiation eliminates the need for global clock skewing to compensate for insertion delays, as each element receives appropriately timed control signals tailored to its specific requirements.
3Adaptability or versatility
If non-critical signals are processed through series transistor stacks, then the logical function is complete, but the setup time for critical signals is increased
Solution Approach 1:
The patent introduces combinational logic circuits as intermediaries between non-critical signals and the transmission gate control. These intermediary logic circuits process non-critical signals and generate appropriate control signals, eliminating the need for series transistor stacks in the critical path. The intermediary logic maintains the complete logical function while enabling faster setup time for critical signals.
Data Source
AI summary
An exemplary functional input sequential circuit for reducing the setup time of input signals. The functional sequential circuit includes a tri-state inverter having an input signal and two control signals. The transmission circuit receives a control signal from a combinational logic circuit that performs a logical operation on a second input signal and a clock signal. The output of the transmission circuit is coupled to a digital storage element. Further, a control circuit is coupled to the digital storage element in order to force a value on the digital storage element when no input signal is received from the transmission circuit. The control circuit is also controlled by the second input signal and a clock signal.