Funnel-Shaped Isolation Structure for Memory Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor memory devices, excessively small isolation structures can cause mutual interference during programming, leading to reliability issues, while excessively large structures can decrease gate coupling ratio (GCR), thereby lowering device performance.
Innovation Solution
A memory structure with a funnel-shaped isolation structure, comprising a first and second isolation layer and a lining layer, where the second isolation layer has a recess, ensuring the top profile is shaped as a funnel, protecting the sidewall of the dielectric layer and increasing GCR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the height of isolation structures is increased to prevent mutual interference during programming, then reliability is improved, but gate coupling ratio (GCR) decreases and device performance is lowered
Solution Approach 1:
The isolation structure is divided into multiple segments: a first isolation layer with greater height extending beyond the dielectric layer top surface, and a second isolation layer with lesser height formed within a recess of the first isolation layer. This segmentation allows different portions to serve different functions - the taller first layer provides isolation for reliability, while the recessed second layer preserves gate coupling for performance.
Solution Approach 2:
Different regions of the isolation structure are given different heights and properties. The first isolation layer has greater height at the edges to provide isolation, while the second isolation layer has lesser height in the recessed region to maintain gate coupling. This local differentiation resolves the contradiction between isolation height and gate coupling.
2Productivity
If the height of isolation structures is decreased to improve gate coupling ratio, then device performance is improved, but mutual interference during programming occurs and reliability is deteriorated
Solution Approach 1:
The isolation structure is divided into multiple segments: a first isolation layer with greater height extending beyond the dielectric layer top surface, and a second isolation layer with lesser height formed within a recess of the first isolation layer. This segmentation allows different portions to serve different functions - the taller first layer provides isolation for reliability, while the recessed second layer preserves gate coupling for performance.
Solution Approach 2:
Different regions of the isolation structure are given different heights and properties. The first isolation layer has greater height at the edges to provide isolation, while the second isolation layer has lesser height in the recessed region to maintain gate coupling. This local differentiation resolves the contradiction between isolation height and gate coupling.
3Ease of manufacture
If conventional planar isolation structures are used, then manufacturing is simple, but they cannot simultaneously ensure adequate isolation height and gate coupling ratio
Solution Approach 1:
The isolation structure is divided into multiple segments: a first isolation layer with greater height extending beyond the dielectric layer top surface, and a second isolation layer with lesser height formed within a recess of the first isolation layer. This segmentation allows different portions to serve different functions - the taller first layer provides isolation for reliability, while the recessed second layer preserves gate coupling for performance.
Solution Approach 2:
The isolation structure transitions from a conventional planar single-layer design to a multi-layer structure with vertical dimensionality. The first isolation layer extends higher, while the second isolation layer is recessed, creating a stepped profile that adds vertical complexity to simultaneously satisfy both isolation height and gate coupling requirements.
Data Source
AI summary
A method of manufacturing a memory structure including the following steps is provided. Stacked structures are formed on a substrate, and each of the stacked structures includes a first dielectric layer and a first conductive layer sequentially disposed on the substrate. A first opening is located between two adjacent stacked structure, and the first opening extends into the substrate. At least one isolation structure is formed in the first opening. The isolation structure covers a sidewall of the first dielectric layer. The isolation structure has a recess therein, such that a top profile of the isolation structure is shaped as a funnel. A second dielectric layer is formed on the stacked structures. A second conductive layer is formed on the second dielectric layer and fills the first opening.


