Photodiode-Side Integrated Fuse for Avalanche Photodetector Arrays
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Solution Overview
Problem
Avalanche photodetector focal plane arrays face issues due to 'leaky' pixels, which short-circuit the entire device, limiting yield and individual pixel addressability, as existing technologies struggle to manage impedance variations effectively.
Innovation Solution
A scalable fuse design is integrated on each pixel of the avalanche photodetector focal plane array, with a low resistance that melts and isolates faulty pixels, ensuring normal operation by positioning the fuse along the pixel edge and connecting it to the photodetector/ROIC with wide buses, fabricated on an atomically flat surface to maintain functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fuse is integrated on a PDA with a non-uniform surface profile (mesoscopically-rough surface, mesa structure), then the fuse can be positioned along the pixel edge for scalability, but the fuse thickness becomes non-uniform which compromises fabrication quality and reliability
Solution Approach 1:
An atomically flat cap layer is deposited over the non-uniform PDA surface before fuse formation. This preliminary action creates a uniform deposition surface that ensures uniform fuse thickness while maintaining the underlying non-uniform pixel structure needed for scalability
Solution Approach 2:
The atomically flat cap layer acts as an intermediary between the non-uniform PDA surface and the fuse. It mediates the conflict by providing a uniform surface for fuse deposition while not interfering with the electrical functionality of the underlying pixel structure
2Adaptability or versatility
If the fuse is positioned along one side of the pixel with wide buses, then the design becomes scalable to 25 μm pixel pitches, but the fuse length and thinness increase making fabrication more difficult
Solution Approach 1:
The atomically flat cap layer is deposited before fuse formation, creating a uniform surface that enables precise fabrication of thin fuses. This preliminary surface preparation makes it feasible to manufacture extremely thin fuses (a few nanometers) with the required precision for scalable pixel designs
Solution Approach 2:
The fuse is positioned in the lateral dimension along the pixel edge rather than extending through the vertical dimension. This lateral positioning with wide buses allows scalability to small pixel pitches while the atomically flat cap layer ensures uniform thickness in the vertical dimension
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively isolates faulty pixels, preventing short-circuiting and allowing the rest of the array to function normally, enhancing device yield and addressability by ensuring that only the faulty pixels are isolated, thus maintaining the operation of the entire array.
Implementation Method 1
The fuses are designed so that their resistance is low enough to enable normal APD FPA operation, but high enough to ensure that the fuse melts in any pixel having problematically low impedance
Data Source
AI summary
A scalable fuse design for individual pixels of a focal plane array of photodiodes comprises a fuse disposed on the upper surface of each photodiode in the array, wherein the fuse is situated proximal to a side of each photodiode. The fuse of each photodiode is electrically coupled to the active region thereof via a first bus and is electrically coupled to an ROIC via a second bus.