Fuse Array Dual Register Unit Parallel Sequential Data Handling
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Solution Overview
Problem
As semiconductor devices become more integrated and capable, the size and complexity of fuse circuits increase, leading to a rise in the number of storage circuits, which complicates the design and increases the size of the semiconductor device.
Innovation Solution
A semiconductor device with a fuse array and a dual register unit system, where the first register unit receives fuse data in parallel and the second register unit receives it sequentially, allowing for efficient storage and processing of fuse data without a proportional increase in the number of registers, thereby managing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of fuse circuit increases to store more information for setting operating environment, then the storage capacity increases, but the number of storage circuits increases proportionally leading to increased design complexity
Solution Approach 1:
The patent divides the storage function into two distinct units: a first register unit that receives fuse data in parallel and a second register unit that receives data sequentially. This segmentation allows the system to handle large amounts of fuse data without requiring a proportional increase in the total number of storage circuits, as the first register unit efficiently captures parallel data while the second register unit processes it sequentially.
Solution Approach 2:
The patent introduces a temporal dimension to data processing by implementing a dual register unit architecture where data flows from parallel reception in the first register unit to sequential processing in the second register unit. This dimensional transformation allows the system to manage increased storage capacity without linearly increasing circuit complexity, as the same physical circuits can handle different data widths at different time stages.
2Quantity of substance
If the number of storage circuits increases to accommodate larger fuse circuit, then the storage capacity increases, but the device size increases
Solution Approach 1:
By segmenting the storage function into two specialized register units with different data reception modes, the patent achieves efficient use of storage resources. The first register unit handles parallel data input while the second register unit manages sequential processing, allowing the system to accommodate larger fuse circuits without requiring a proportional increase in total storage circuit count and physical area.
Solution Approach 2:
The dual register unit architecture provides multi-functionality where the same physical storage circuits serve different purposes at different times. The first register unit receives parallel fuse data while the second register unit processes it sequentially, allowing the system to achieve high storage capacity with compact circuit implementation that serves multiple functional requirements.
3Quantity of substance
If the number of storage circuits increases to store fuse data, then the storage capacity increases, but the manufacturing cost increases
Solution Approach 1:
The patent segments the storage architecture into two functional units with different data reception characteristics, enabling efficient utilization of storage resources. This segmentation allows the system to achieve high storage capacity without linearly increasing the number of physical storage circuits required, thereby reducing manufacturing costs while maintaining the ability to store extensive fuse data for complex operating environments.
Solution Approach 2:
The patent changes the operational parameters of the register units by implementing different data reception modes (parallel for the first unit, sequential for the second unit). This parameter variation allows the system to optimize storage capacity without proportionally increasing circuit count, leading to cost-effective manufacturing while maintaining high storage capability for large fuse circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents the unnecessary increase in the number of storage circuits and design complexity, maintaining efficiency and compactness in semiconductor device design as capacity and integration increase.
Implementation Method 1
an antifuse circuit which changes from a high resistance state to a low resistance state
Data Source
AI summary
Provided are a semiconductor device including a fuse and a method of operating the same. The semiconductor device includes a fuse array, a first register unit, and a second register unit. The fuse array includes a plurality of rows and columns. The first register unit receives at least one row of fuse data from the fuse array. Fuse data of the at least one row of fuse data is received in parallel by the first register unit. The second register unit receives the fuse data at least one bit at a time from the first register unit.