Fuse Blow Circuit Reduces Semiconductor Configuration Time

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Solution Overview

Problem

The process of blowing electronic fuses in semiconductor devices is time-consuming, especially when replicated multiple times, leading to increased costs and inefficiencies.

Innovation Solution

Implementing a fuse blow circuit with two fuse blow outputs, where one output blows an electronic fuse representing a configuration bit and the other blows an inversion status bit, allowing for the use of an inverter to invert the configuration bit based on the inversion status bit, and strategically deciding which fuses to blow based on the proportion of configuration fuses to be set, thereby reducing the number of fuses that need to be blown.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple electronic fuses are blown to configure semiconductor devices, then device customization capability is improved, but configuration time increases significantly

Engineering Contradiction:
Improvedevice customization capabilityVSAvoidconfiguration time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent applies inversion by introducing an inversion status bit that allows the output of configuration bits to be inverted. Instead of blowing individual fuses for each possible configuration state, the system blows fuses to set configuration bits and uses the inversion status bit to generate complementary configurations. This means that blowing a configuration bit fuse sets it to one state, while the same physical action combined with the inversion bit produces the opposite logical state, effectively doubling the configuration capability without doubling the number of physical fuses needed.

Inventive Principle:
Principle #13The other way round (Inversion)

2Manufacturing precision

If individual fuse blowing circuits are used for each configuration bit, then configuration precision is maintained, but the number of circuit operations increases

Engineering Contradiction:
Improveconfiguration precisionVSAvoidconfiguration speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges the functionality of multiple independent fuse blowing operations into a unified process. By combining configuration bits with an inversion status bit, the system processes multiple configuration states through a single fused operation. The sense amplifier and logic circuitry process the combined inputs to generate the final configuration output, reducing the number of separate blowing operations required while maintaining precise control over each configuration state.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If more fuses are blown to achieve complete configuration coverage, then configuration completeness is improved, but process complexity increases

Engineering Contradiction:
Improveconfiguration completenessVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The inversion status bit serves multiple functions: it inverts the output of configuration bits, enables generation of complementary configurations, and reduces the total number of fuses needed. This multi-functional element allows the same physical fuse blowing operation to achieve multiple configuration outcomes depending on the state of the inversion bit, thereby improving configuration completeness without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the time required to configure semiconductor devices by minimizing the number of fuses that need to be blown, resulting in substantial time savings, especially when dealing with large numbers of fuses.

Implementation Method 1

Asserting the gate of fuse blow transistor 110 at a logic '1' causes a current driven by VPP to traverse fuse 130 and thereby blow fuse 130

Methodology Applied
Scientific EffectJoule Heating: Joule Heating

Data Source

PatentUS7489180B2Systems and methods for efuse fusing time reduction
Publication Date: 2009.02.10 TEXAS INSTRUMENTS INC
  • US7489180B2 patent drawing
  • US7489180B2 patent drawing
  • US7489180B2 patent drawing

AI summary

Various systems and methods for device configuration are disclosed herein. For example, some embodiments of the present invention provide semiconductor devices that include a fuse blow circuit. The fuse blow circuit provides two fuse blow outputs. Assertion of one of the fuse blow outputs causes one electronic fuse to blow, and assertion of the other fuse blow output causes another electronic fuse to blow. One of the electronic fuses represents a configuration bit while the other electronic fuse represents an inversion status bit indicating an inversion to be applied to the configuration bit. Both the configuration bit and the inversion status bit are applied to an inverter which operates to invert the configuration bit based at least in part on the inversion status bit.