Fuse Box Parallel Fuse Structure Reducing Cutting Operations

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Solution Overview

Problem

Semiconductor memory devices face inefficiencies in replacing defective cells with redundant cells due to the time-consuming process of cutting fuse connections, which affects the speed and reliability of data access.

Innovation Solution

A semiconductor memory device design featuring a fuse box with a first fuse connected to a power line and multiple second fuses in parallel, where if the second fuses are determined to be cut off, the first fuse is cut off instead, reducing the number of cutting operations required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple second fuses are cut off individually to replace defective cells, then the defective cells can be replaced with redundant cells, but the time required for fuse cutting operations increases

Engineering Contradiction:

Improvedefective cell replacementVSAvoidfuse cutting operation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent merges multiple second fuses (F21-F24) into a single first fuse (F1) structure. When any of the second fuses need to be cut, the system instead cuts the single first fuse that is connected in series with all second fuses. This combining approach reduces the number of cutting operations from multiple individual fuse cuts to a single cut, directly resolving the time consumption issue while maintaining the same defective cell replacement functionality.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The fuse structure is segmented into a first fuse (F1) connected to the power line and multiple second fuses (F21-F24) connected in parallel between the first fuse and ground. This segmentation allows the system to replace multiple individual fuse cutting operations with a single first fuse cut, as the first fuse serves as a common control point for all second fuses.

Inventive Principle:

Principle #1Segmentation

2Manufacturing precision

If multiple second fuses are cut off to store defective cell addresses, then the addresses can be properly recorded, but the manufacturing process complexity increases

Engineering Contradiction:

Improvedefective cell address storageVSAvoidfuse structure complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple second fuses into a single first fuse structure that serves the same address storage function. Instead of managing multiple individual fuse cuts to record defective cell addresses, the system uses a single first fuse cut to achieve the same result, thereby reducing manufacturing process complexity while maintaining address storage precision.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The first fuse (F1) serves multiple functions: it acts as a common control element for multiple second fuses and simultaneously provides the address storage capability that would otherwise require multiple separate fuse structures. This multi-functionality reduces the overall device complexity while maintaining the precision needed for defective cell address storage.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS7813207B2Fuse box and semiconductor memory device including the same

Publication Date: 2010.10.12 SAMSUNG ELECTRONICS CO LTD

AI summary

A fuse box of a semiconductor memory device which comprises a plurality of fuse units commonly connected to a power line, each of the fuse units comprising a first fuse connected with the power line; and a plurality of second fuses connected with the first fuse in parallel. If the second fuses are determined to be cut off, the first fuse is cut off instead of the second fuses.