FUSE Cache Mapping for Low-Context-Switch Data Requests

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Solution Overview

Problem

The existing filesystem in userspace (FUSE) experiences low processing efficiency due to multiple context switches during data request handling, which affects the efficiency of data request processing.

Innovation Solution

A method and apparatus that enable the userspace process to directly access cached data from the kernel module by obtaining a data request list with virtual address information, querying physical address information, and accessing target cached data without context switching, utilizing shared memory for data reading and writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the userspace process receives data requests through character device communication with the kernel module, then the filesystem maintains strong compatibility and low latency, but multiple context switches occur during data request handling, reducing processing efficiency

Engineering Contradiction:
Improvedata request processing efficiencyVSAvoidcontext switch time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges the kernel module's cached data into the userspace process's address space by mapping the cached data's physical address to a virtual address accessible by the userspace process. This integration eliminates the need for context switches when accessing cached data, as both the kernel module and userspace process can access the same memory region directly, thereby resolving the contradiction between maintaining compatibility and improving processing efficiency.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a shared memory mapping mechanism as an intermediary between the kernel module and userspace process. By mapping the cached data to a virtual address in the userspace process, this intermediary enables direct access without context switches, thus improving data request processing efficiency while maintaining the existing FUSE architecture's compatibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the userspace process directly accesses cached data from the kernel module, then processing efficiency improves, but the complexity of address mapping and memory management increases

Engineering Contradiction:
Improvedata request processing efficiencyVSAvoidaddress mapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses the operating system's virtual memory management mechanism as an intermediary to handle the address mapping complexity. The mmap system call and page table management provide a standardized interface for mapping the cached data's physical address to a virtual address, abstracting away the underlying complexity from the userspace process while enabling direct access to cached data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The userspace process performs the address mapping operation itself through the mmap system call, rather than relying on the kernel module to manage the mapping. This self-service approach allows the userspace process to directly control the mapping of cached data to its address space, simplifying the overall system architecture while improving access efficiency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4502801B1Method, apparatus, device and storage medium for data request processing
Publication Date: 2025.12.03 BEIJING VOLCANO ENGINE TECH CO LTD
  • EP4502801B1 patent drawingFigure 1~2
  • EP4502801B1 patent drawingFigure 3~4
  • EP4502801B1 patent drawingFigure 5

AI summary

Embodiments of the present disclosure provide a method, an apparatus, a device and a storage medium for data request processing. The method is applied at a filesystem in userspace which includes a kernel module and a userspace process. The method includes: obtaining a data request list in the kernel module, where the data request list includes a plurality of data requests to be processed and virtual address information corresponding to respective data requests of the plurality of data requests; querying, for each of the data requests, physical address information corresponding to the virtual address information, according to the virtual address information corresponding to the data request; querying target cached data corresponding to the data request, from a plurality of cached data stored in the kernel module; accessing the target cached data, and processing the data request.