Fuse Capacitor Covering Material for Anti-Fuse Reliability

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Solution Overview

Problem

In semiconductor constructions, the integration of fuse capacitors as anti-fuses in DRAM manufacturing faces challenges in ensuring reliable short-circuit creation between electrodes without damaging surrounding components, particularly due to the need for high voltage application and the risk of etching issues during chemical treatments.

Innovation Solution

The use of fuse capacitors with a covering material of different composition, such as silicon nitride, spaced from insulator material like silicon dioxide, allows for the formation of anti-fuse structures within peripheral regions, enabling controlled short-circuit creation while protecting adjacent components from etching damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high voltage is applied to create a short circuit between electrodes in fuse capacitors, then anti-fuse functionality is achieved, but surrounding components may be damaged due to etching issues during chemical treatments

Engineering Contradiction:
Improveanti-fuse functionalityVSAvoidetching damage to surrounding components
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A covering material layer is introduced as an intermediary between the fuse capacitor and the surrounding insulator material. This covering layer acts as a protective mediator that prevents etching chemicals from damaging the insulator material during high voltage processing, while allowing the fuse capacitor to function properly.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The covering material is applied in advance before the high voltage treatment and chemical processing steps. This pre-protection layer cushions the surrounding components against potential etching damage that would occur during the anti-fuse activation process, ensuring the integrity of adjacent structures.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If fuse capacitors are integrated into DRAM manufacturing with surrounding insulator material, then manufacturing efficiency is improved, but the risk of etching damage to adjacent structures increases

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidetching damage risk
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The covering material serves as a protective intermediary layer that enables the integration of fuse capacitors into the DRAM manufacturing process without compromising the surrounding insulator material. This layer allows chemical treatments to proceed safely while maintaining manufacturing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure employs composite materials with the covering material having different composition and properties than the surrounding insulator material. This composite approach allows the covering layer to provide etching resistance while the underlying insulator material maintains its electrical isolation functions.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures reliable anti-fuse functionality with reduced risk of etching damage, enhancing the manufacturing process by maintaining the integrity of surrounding materials during high voltage applications and chemical treatments.

Implementation Method 1

High voltage may be applied to a fuse capacitor to create a short circuit between lower and upper electrodes

Methodology Applied
Scientific EffectElectrical breakdown: Avalanche Breakdown

Data Source

PatentUS9209194B1Semiconductor constructions comprising fuse capacitors
Publication Date: 2015.12.08 MICRON TECHNOLOGY INC
  • US9209194B1 patent drawing
  • US9209194B1 patent drawing
  • US9209194B1 patent drawing

AI summary

Some embodiments include a semiconductor construction having a semiconductor substrate and an interlayer insulating material over the substrate. Memory cells are supported by the substrate, and each memory cell includes a cell transistor and a cell capacitor. The cell transistor has source and drain regions extending into the semiconductor substrate. A conductive plug extends through the interlayer insulating material and is in electrical contact with one of the source and drain regions, and with the cell capacitor. The construction also includes at least one anti-fuse having a fuse capacitor. A covering material is between the fuse capacitor and the interlayer insulating material, and is in direct contact with the interlayer insulating material. The covering material is of a different composition than the interlayer insulating material.