Fuse Circuit Area Reduction via Grouped Registers
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Solution Overview
Problem
As semiconductor devices integrate more information, the area occupied by fuse circuits increases, necessitating a configuration that optimizes area usage and ensures efficient operation.
Innovation Solution
A semiconductor device with a fuse array, a common signal generation unit for power-up and reset signals, grouped fuse registers, and an output selection unit that sequentially outputs fuse data to minimize area usage and enhance operational efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the amount of information stored on the fuse circuit increases, then the functionality and operation conditions coverage improve, but the area occupied by the fuse circuit increases
Solution Approach 1:
The fuse circuit is divided into multiple fuse banks (first fuse bank, second fuse bank, third fuse bank) with each bank storing specific types of information. This segmentation allows the total fuse array to be organized into manageable units that can be independently controlled and accessed, maintaining full functionality while enabling compact layout optimization.
Solution Approach 2:
The patent transitions from a conventional single-dimensional fuse array layout to a multi-dimensional organization structure with multiple fuse banks arranged in specific patterns (e.g., interleaved or distributed arrangements). This dimensional reorganization allows better space utilization and reduces the overall area required while maintaining all necessary storage capabilities.
2Adaptability or versatility
If more fuse data is stored to increase functionality, then the operation flexibility improves, but the circuit complexity increases
Solution Approach 1:
The fuse circuit is designed with multi-functional capabilities where the same fuse array structure supports multiple operation modes (e.g., normal operation mode, test operation mode, die-ID output mode). The fuse banks can be selectively activated based on the required function, allowing a single circuit to perform multiple roles without requiring separate dedicated circuits for each function.
Solution Approach 2:
The patent implements dynamic control mechanisms where the operation mode can be switched between different states (normal mode, test mode, die-ID mode) based on external signals or internal conditions. This dynamic adaptability allows the circuit to optimize its behavior for different operational requirements, maintaining flexibility while managing complexity through unified control logic.
Data Source
AI summary
A semiconductor device includes a fuse array with a plurality of fuses, a common signal generation unit suitable for receiving a power-up signal and generating an inverted power-up signal and a reset signal, a plurality of fuse registers suitable for latching a plurality of fuse data for the plurality of fuses and commonly receiving the inverted power-up signal and the reset signal from the common signal generation unit by grouped fuse registers, and an output selection unit suitable for outputting the plurality of fuse data stored on the plurality of fuse registers according to a predetermined sequence.