Fuse Data Latch Control for Low-Power Semiconductor Memory

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Solution Overview

Problem

Semiconductor devices face challenges in achieving small size, low power consumption, and high capacity due to the increased number of fuse circuits, which leads to higher power consumption.

Innovation Solution

The semiconductor device incorporates a boot-up signal generation circuit, oscillating circuit, counting circuit, fuse array, and latch circuit to efficiently manage fuse data, reducing power consumption by enabling and disabling signals and fixing fuse data information signals to specific levels during different durations of the boot-up operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If more fuse circuits are included to provide larger capacity, then the storage capacity is improved, but the power consumption increases

Engineering Contradiction:
Improvestorage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by enabling the fuse array and latch circuit only during specific time intervals (boot-up phase and data output phase) rather than continuously. The control circuit activates these components periodically based on operational requirements, allowing the system to maintain large fuse array capacity while consuming power only when data storage or retrieval is needed, thus resolving the contradiction between storage capacity and power consumption

Inventive Principle:
Principle #19Periodic action

2Quantity of substance

If more fuse circuits are included to provide larger capacity, then the storage capacity is improved, but the device size increases

Engineering Contradiction:
Improvestorage capacityVSAvoiddevice size
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent applies merging by integrating the latch circuit directly with the fuse array structure, where the latch circuit shares physical space and control resources with the fuse array. This consolidation allows the system to achieve large storage capacity through functional integration rather than physical expansion, maintaining compact device size while providing enhanced storage capability through the combined fuse-latch architecture

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If fuse data is continuously outputted, then the data availability is improved, but the power consumption increases

Engineering Contradiction:
Improvedata availabilityVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by enabling the fuse array and latch circuit only during specific time intervals (boot-up phase and data output phase) rather than continuously. The control circuit activates these components periodically based on operational requirements, allowing the system to maintain large fuse array capacity while consuming power only when data storage or retrieval is needed, thus resolving the contradiction between storage capacity and power consumption

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10496414B2Semiconductor device and method of operating the same
Publication Date: 2019.12.03 SK HYNIX INC
  • US10496414B2 patent drawing
  • US10496414B2 patent drawing
  • US10496414B2 patent drawing

AI summary

A semiconductor device may include a fuse array configured to output fuse data. The semiconductor device may include a latch circuit configured to store the fuse data during an enabled section of a dummy boot-up signal, output the stored fuse data as a fuse data information signal during a disabled section of the dummy boot-up signal, and fix the fuse data information signal to a specific level during the enabled section of the dummy boot-up signal regardless of the stored fuse data.