Electrically-Verifiable Fuse Structures for Semiconductor Wafer Integrity
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Solution Overview
Problem
Conventional fuse verification processes in semiconductor wafers and dies cannot reliably differentiate between programmed fuses with normal and abnormally large fuse cavities, leading to reliability issues such as crack formation due to chemical etching processes that degrade fuses.
Innovation Solution
Incorporating additional sense contacts on both sides of programmable fuses to detect changes in resistance after programming, allowing for electrical verification of fuse integrity by measuring electrical parameters and comparing them to pass/fail criteria.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fuse verification processes are used, then manufacturing simplicity is maintained, but reliability deteriorates due to inability to detect abnormally large fuse cavities
Solution Approach 1:
The patent introduces an intermediary sensing mechanism (electrical resistance measurement through fuse head contacts) that mediates between the fuse cavity structure and the verification process. This intermediary allows indirect detection of cavity abnormalities without requiring complex direct imaging or inspection equipment, thereby improving reliability while limiting complexity increase.
Solution Approach 2:
The patent replaces mechanical/visual inspection methods with electrical measurement methods. Instead of using microscopes or physical probes to inspect fuse cavities, the invention uses electrical resistance measurements through contacts on the fuse heads to detect cavity abnormalities, substituting a simpler electrical system for a more complex mechanical inspection system.
2Measurement precision
If additional sense contacts are added to fuse structures, then measurement precision improves for detecting fuse integrity, but device complexity increases
Solution Approach 1:
The sense contacts serve multiple functions: they provide electrical connection for normal circuit operation and simultaneously serve as measurement points for fuse integrity verification. This multi-functionality allows the same structural elements to fulfill both operational and diagnostic roles, improving measurement precision without proportionally increasing device complexity.
Solution Approach 2:
The fuse structure itself provides the means for its own verification through the sense contacts that are already part of the fuse design. The electrical parameters can be measured using the existing fuse head contacts without requiring external or additional verification-specific components, allowing the structure to serve its own testing needs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures zero fail-rate in field by reliably verifying the structural integrity of fuses, preventing damage from post-programming processing and ensuring reliable electrical connections.
Implementation Method 1
In the case of laser fuses, a high energy laser is used to evaporate metal (e.g. Al, Cu, etc.) and create a crater or cavity which interrupts the fuse being programmed
Implementation Method 2
forcing a high current through the fuse element
Implementation Method 3
chemical etching is often performed after fuse programming. Chemical etchants can degrade programmed fuses, even if the fuses are covered with a protective passivation layer after programming and prior to etching
Implementation Method 4
measuring an electrical parameter at a first pair of sense contacts electrically connected to different areas of the first fuse head
Data Source
AI summary
A semiconductor wafer includes a semiconductor substrate having a plurality of die areas separated from one another by dicing areas. Each die area includes one or more metal layers above the semiconductor substrate and a plurality of fuse structures formed in at least one of the one or more metal layers. Each fuse structure includes a fuse area between first and second fuse heads. Each die area also includes a first pair of contacts connected to different areas of the first fuse head of at least some of the fuse structures. The wafer can be singulated along the dicing areas into individual dies. A corresponding method of fuse verification is also provided.