Integrated Fuse-Resistor Layout for High Sheet Resistance

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Solution Overview

Problem

Conventional semiconductor device manufacturing processes face challenges with shrinking resistors having insufficient sheet resistance, leading to increased complexity and costs.

Innovation Solution

A semiconductor device structure is designed with a fuse and resistor electrode integrated in a semiconductor substrate, featuring an isolation structure between them, and a source/drain region electrically connected to the resistor electrode, allowing for high sheet resistance without additional masks or process steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If conventional process flow is used to form shrinking resistors, then device miniaturization is achieved, but sheet resistance becomes insufficient

Engineering Contradiction:
Improveresistor sizeVSAvoidsheet resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by forming a doping region with higher dopant concentration specifically in the resistor portion of the polysilicon layer. This localized doping enhancement increases the sheet resistance of the resistor without affecting other device components, thereby resolving the contradiction between miniaturization and maintaining sufficient sheet resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the dopant concentration parameter locally within the resistor region. By increasing the dopant concentration in the resistor portion compared to other areas, the sheet resistance is enhanced. This parameter change allows the resistor to maintain adequate resistance values even as the overall device size shrinks.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional masks or process steps are implemented to achieve high sheet resistance, then resistor performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvesheet resistanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the resistor formation process with the existing transistor gate electrode formation process. Both structures are formed simultaneously from a single polysilicon layer using the same patterning and doping steps. This integration eliminates the need for separate masks and process steps that would otherwise be required to achieve high sheet resistance, thereby improving resistor performance without increasing manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The polysilicon layer serves multiple functions: it forms both the transistor gate electrode and the resistor structure. The same doping process that creates the gate electrode also creates the high-resistance resistor region. This multi-functionality reduces the number of required process steps and masks while achieving the desired high sheet resistance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12514000B2Semiconductor device structure with fuse and resistor and method for preparing the same
Publication Date: 2025.12.30 NAN YA TECH
  • US12514000B2 patent drawing
  • US12514000B2 patent drawing
  • US12514000B2 patent drawing

AI summary

A semiconductor device structure includes an isolation structure disposed in a semiconductor substrate. The semiconductor device structure also includes a fuse and a resistor electrode disposed in the semiconductor substrate. The isolation structure is disposed between the fuse and the resistor electrode, and the isolation structure is closer to the resistor electrode than the fuse. The semiconductor device structure further includes a source/drain (S/D) region disposed in the semiconductor substrate and between the fuse and the isolation structure. The S/D region is electrically connected to the resistor electrode.