Fuse-Controlled Shift Register Layout for Reliable Output Setting
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Solution Overview
Problem
Conventional shift registers with electrical fuses require additional registers for input data and have a large layout area, and are prone to errors due to unexpected cutting of electrical fuses during operation.
Innovation Solution
A shift register design that eliminates the need for additional registers by using a series-connected register flip-flop group circuit with fuse control flip-flops, electrical fuses, and multiplexers, which receive enable signals to control the cutting of fuses and output signals, allowing for a smaller layout area and reduced error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional parallel register with electrical fuses is used, then the electrical fuses can be selectively cut to generate final output signals, but an additional register is required for input data which increases layout area
Solution Approach 1:
The patent combines the input data register and shift register functions into a single integrated circuit. The register D flip-flops serve dual purposes: storing input data and performing shift operations. This eliminates the need for separate additional registers while maintaining the electrical fuse cutting control capability, thereby reducing layout area without compromising reliability
Solution Approach 2:
The register D flip-flops are designed to perform multiple functions: they store input data, perform shift operations, and control the cutting of electrical fuses. The Q output terminals of these flip-flops are connected to both the next stage input and the electrical fuse control circuits, enabling them to serve universal purposes and eliminate the need for dedicated additional registers
2Area of stationary object
If a conventional shift register with electrical fuses is used, then the layout area is reduced compared to parallel registers, but errors occur when electrical fuses are cut during unexpected clock cycles
Solution Approach 1:
The patent applies preliminary action by requiring that the electrical fuse cutting condition be fully established before the clock edge occurs. The control circuit monitors both the data input signal and the clock signal, and only enables fuse cutting when the data has been stable for a predetermined period before the clock edge. This prevents unexpected cutting during clock transitions, ensuring reliability while maintaining compact layout
Solution Approach 2:
The patent implements feedback control where the Q output of each register D flip-flop is fed back to control the cutting of the corresponding electrical fuse. The feedback mechanism ensures that fuse cutting is triggered only by valid registered data states, not by transient or unstable signals. This feedback control prevents erroneous fuse cutting during unexpected clock cycles while maintaining the area efficiency of the shift register structure
3Adaptability or versatility
If additional registers are added to a shift register for test mode, then test functionality is improved, but the layout area increases significantly
Solution Approach 1:
The patent makes the shift register universal by enabling it to operate in multiple modes: normal shift mode and test mode. The same register D flip-flops and electrical fuse control circuitry are used for both modes. During test mode, the electrical fuses can be selectively cut based on test data, and during normal operation, they function as part of the shift register. This multi-functionality eliminates the need for separate additional registers for test mode, improving adaptability without increasing layout area
Data Source
AI summary
A shift register including an electrical fuse and a method of operating the shift register are disclosed. The shift register includes a register flip-flop group circuit and a plurality of output circuits respectively receiving a plurality of enable signals. Each output circuit includes a fuse control flip-flop receiving one of the plurality of enable signals and outputting a fuse control signal in response to the one enable signal. Each output circuit also includes an electrical fuse receiving the fuse control signal and outputting an electrical fuse mode signal, and a multiplexer outputting either the register output signal or the electrical fuse mode signal as a final output signal in accordance with the one enable signal.