Fuse Structure Side Wall Electrode for Dielectric Breakdown
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Solution Overview
Problem
The thick oxide layer in gate structures of anti-fuse type memory devices makes it difficult to break down the fuse dielectric layer, hindering the programming process.
Innovation Solution
A fuse structure is designed with a gate structure, first and second electrodes, and an isolation structure, where the second electrode is formed on the side of the gate structure, increasing the contact area and reducing conductive resistance, allowing for easier breakdown of the fuse dielectric layer, using materials like titanium nitride for electrodes and hafnium oxide as the gate dielectric layer with a thickness less than 25 angstroms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick oxide layer is used in the gate structure to tune the work function, then the work function tuning is improved, but the fuse dielectric layer becomes difficult to break down
Solution Approach 1:
The patent transitions from a planar electrode configuration to a three-dimensional configuration where the second electrode is formed on the side wall of the gate structure. This vertical dimension addition increases the contact area between the second electrode and the fuse dielectric layer, enabling effective breakdown even with a thick oxide layer present in the gate structure.
Solution Approach 2:
The patent applies different electrode configurations to different regions: the first electrode is formed on the active area spaced from the gate, while the second electrode is formed on the side wall of the gate structure. This localized differentiation allows the side wall region to provide enhanced contact area for fuse dielectric layer breakdown while the main gate structure maintains its thick oxide layer for work function tuning.
2Ease of manufacture
If the contact area between electrode and fuse dielectric layer is increased, then the breakdown difficulty is reduced, but the device complexity increases
Solution Approach 1:
The patent combines the formation of the second electrode with the existing gate structure fabrication process. The second electrode is formed on the side wall of the gate structure during the same processing steps, merging two functions (gate formation and electrode contact area enhancement) into a unified structure rather than adding separate complex components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the difficulty in breaking down the fuse dielectric layer, enhancing the programming efficiency by increasing current flow and reducing resistance, thus improving the programmability of the memory device.
Implementation Method 1
When programmed, the voltage is increased to break down the fuse dielectric layer. At this time, the anti-fuse structure is equivalent to a resistor, and presents a low-resistance state.
Data Source
AI summary
A fuse structure includes a gate structure, a first electrode, a second electrode and an isolation structure. The gate structure is at least partially formed on an active area of a substrate. The first electrode is formed on the active area of the substrate and spaced apart from the gate structure. The second electrode is formed at least on a side of the gate structure. The isolation structure is formed between the active area and the second electrode.