Fuse Information Storage Circuit with Test Mode Decoder

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Solution Overview

Problem

Current semiconductor apparatuses face challenges in efficiently storing fuse information due to complex procedures and potential errors in fuse information storage, which can lead to reliability issues.

Innovation Solution

A fuse information storage circuit is designed with multiple storage paths, including a test mode decoder, count latch, and a shared fuse array block, allowing for simplified storage and error handling by using a dedicated signal path and external control for storing fuse information through normal data paths or alternative paths if errors occur.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If fuse information is stored through the normal data path, then the storage process is integrated with normal data operations, but errors may occur during storage that compromise reliability

Engineering Contradiction:
Improvestorage process integrationVSAvoidfuse information storage reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent divides the storage system into two independent paths: a normal data path for regular operations and a dedicated test mode path for fuse information storage. This segmentation allows each path to be optimized independently, with the test mode path providing error-free storage for critical fuse information while the normal path handles general data operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a test mode decoder as an intermediary component that receives test mode signals and generates control signals for error-free fuse information storage. This intermediary ensures that fuse information is stored through a controlled, verified process rather than through the potentially error-prone normal data path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a dedicated test mode signal path is used for storing fuse information, then storage reliability is improved, but the device complexity increases due to additional paths and components

Engineering Contradiction:
Improvefuse information storage reliabilityVSAvoidsignal path complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The test mode decoder serves multiple functions: it decodes test mode signals, generates control signals for fuse information storage, and coordinates the test mode write operations. By making this component multi-functional, the patent reduces the need for separate dedicated components for each function, thereby reducing overall device complexity while maintaining the dedicated path's reliability benefits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the fuse information storage function with the existing test mode infrastructure. The test mode decoder and count latch are integrated into the data input/output pin array structure, allowing fuse information to be stored through the test mode path without requiring completely separate hardware, thus reducing complexity compared to a fully independent storage system.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple fuse information storage paths are provided with error handling, then reliability is enhanced through redundancy, but the device complexity and resource usage increase

Engineering Contradiction:
Improvefuse information storage reliabilityVSAvoidstorage path complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic path selection where the system can switch between normal data path and test mode path based on operational requirements. The test mode decoder dynamically generates control signals to direct fuse information through the appropriate path, allowing the system to adapt its storage mechanism to current needs rather than maintaining both paths active simultaneously, reducing resource usage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent performs preliminary verification through the test mode decoder before storing fuse information. The decoder validates test mode signals and prepares control signals in advance, ensuring that only verified fuse information is stored through the dedicated path. This preliminary action prevents errors before they occur, reducing the need for complex error correction mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9076538B2Fuse information storage circuit of semiconductor apparatus
Publication Date: 2015.07.07 MIMIRIP LLC
  • US9076538B2 patent drawing
  • US9076538B2 patent drawing
  • US9076538B2 patent drawing

AI summary

A test mode decoder configured to decode a test mode signal inputted a plurality of times and to generate preliminary fuse information, a count latch configured to count the preliminary fuse information in response to a count clock signal and to generate fuse information, and a fuse array block configured to store the fuse information can be included.