Unreacted Polysilicon Quantification in FUSI Gates
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Solution Overview
Problem
Current methods for measuring unreacted polycrystalline silicon in fully silicided gates of integrated circuits are inefficient, as they rely on transmission electron microscopy, which has limited throughput and is economically prohibitive for providing statistically reliable samples.
Innovation Solution
A method involving deprocessing integrated circuits to expose unreacted polysilicon, acquiring SEM images, generating mask images to identify gate regions, applying masks to isolate unreacted polysilicon, and quantifying its area relative to the total gate area, using oxidizing and etching solutions composed of ammonium hydroxide, hydrogen peroxide, hydrochloric acid, nitric acid, and ethylene glycol.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transmission electron microscopy is used to measure unreacted polysilicon, then measurement precision is improved, but productivity deteriorates due to limited throughput and high cost
Solution Approach 1:
The patent uses scanning electron microscopy to create images of the gate structure, which serve as copies or representations of the actual polysilicon distribution. These images allow for statistical analysis of unreacted polysilicon without requiring expensive TEM analysis of each sample, thereby improving throughput while maintaining measurement capability
Solution Approach 2:
The patent employs scanning electron microscopy, which is a more accessible and less expensive technique compared to transmission electron microscopy. This allows for rapid acquisition of multiple samples for statistical analysis, improving productivity while still providing sufficient measurement precision for process control
2Measurement precision
If transmission electron microscopy is used to measure unreacted polysilicon, then measurement precision is improved, but loss of time increases due to economically prohibitive sampling requirements
Solution Approach 1:
The patent creates image copies of gate regions using scanning electron microscopy, which can be rapidly acquired and analyzed. This allows for statistical sampling of multiple regions without the time-consuming TEM preparation and analysis required by conventional methods
Solution Approach 2:
The patent analyzes a statistically significant number of gate regions using scanning electron microscopy, which is faster than TEM. By using a larger sample size that is still rapidly acquirable, the method achieves reliable measurements without the excessive time loss associated with TEM's limited throughput
3Ease of operation
If deprocessing is performed to expose unreacted polysilicon, then ease of operation is improved, but device complexity increases due to additional process steps
Solution Approach 1:
The patent extracts or removes the nickel silicide layer through deprocessing to expose the underlying polysilicon gate material. This extraction allows direct visualization and measurement of unreacted polysilicon using scanning electron microscopy, making the measurement process more straightforward despite the additional deprocessing step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a statistically significant measurement of unreacted polysilicon in a fraction of the time and cost of traditional methods, enabling more efficient characterization and optimization of nickel silicide processes.
Implementation Method 1
an oxidizing solution composition of ammonium hydroxide and hydrogen peroxide
Implementation Method 2
an etching solution composition of hydrochloric acid, nitric acid and ethylene glycol
Implementation Method 3
acquiring an image of a statistically significant sample region using scanning electron microscopy (SEM)
Data Source
AI summary
Measuring the amount of unreacted polysilicon gate material in a fully silicided (FUSI) nickel silicide gate process for metal oxide semiconductor (MOS) transistors in an integrated circuit (IC) to guide process development and monitor IC production requires a statistically significant sample size and an economical procedure. A method is disclosed which includes a novel deprocessing sequence of oxidizing the nickel followed by removing the nickel silicide by acid etching, acquiring an SEM image of a deprocessed area encompassing a multitude of gates, forming a quantifiable mask of the original gate area in the SEM image, forming a quantifiable image of the unreacted polysilicon area in the SEM image, and computing a fraction of unreacted polysilicon.