Fusion Memory Stack with Process-Independent Heterogeneous Cells
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Solution Overview
Problem
Existing methods for merging heterogeneous memory devices face challenges in achieving desired electrical performance due to process compatibility issues, particularly when high-temperature processes affect pre-formed peripheral circuits or memory devices, leading to limitations in manufacturing cost and electrical characteristics.
Innovation Solution
A fusion memory device is fabricated by independently forming first and second memory cell circuits on separate substrates, with a non-memory device controlling the electrical operation between them, allowing for process independence and avoiding thermal deterioration, thereby securing compatibility and desired electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If heterogeneous memory devices are combined using bonding wires or through electrodes, then compatibility in fabricating heterogeneous memory devices is improved, but manufacturing costs increase and areas for bonding wires are required
Solution Approach 1:
The patent merges multiple heterogeneous memory devices (first memory device, second memory device, and non-memory device) into a single integrated structure where they share common substrates and are interconnected through integrated circuits. This consolidation eliminates the need for separate bonding wires and through electrodes, reducing both manufacturing complexity and device area while maintaining fabrication compatibility.
Solution Approach 2:
The integrated circuit serves multiple functions: it acts as a peripheral circuit for the first memory device, a control circuit for the second memory device, and a non-memory device itself. This multi-functionality reduces the overall device complexity by consolidating multiple separate components into a single universal structure that performs multiple roles.
2Device complexity
If successive processes are performed to form heterogeneous memory devices stacked on peripheral circuit, then device integration is improved, but electrical characteristics deteriorate due to high-temperature processes affecting pre-formed components
Solution Approach 1:
The patent forms the first memory device and its peripheral circuit on the first substrate in advance, before forming the second memory device on the second substrate. This preliminary action allows the first memory device to be completed and stabilized before undergoing subsequent high-temperature processes, preventing thermal deterioration and maintaining electrical characteristics while achieving high device integration.
Solution Approach 2:
The patent divides the fabrication process into separate stages for different memory devices on different substrates. The first memory device is formed and stabilized on the first substrate, then the second memory device is formed on the second substrate in a subsequent process. This segmentation allows each device to be optimized independently and protects pre-formed components from thermal damage during later processing steps.
Data Source
AI summary
Disclosed are fusion memory devices and methods of fabricating the same. The fusion memory device comprises a first memory device including a first substrate having active and inactive surfaces opposite to each other and a first memory cell circuit on the active surface of the first substrate, a non-memory device including a second substrate having active and inactive surfaces opposite to each other and a non-memory circuit on the active surface of the second substrate, the non-memory device being provided on the first memory device, and a second memory device on the inactive surface of the second substrate and including a second memory cell circuit different from the first memory cell circuit. The non-memory device lies between the first and second memory cell circuits and controls an electrical operation of each of the first and second memory cell circuits.