GOA Buffer Layer Stress Dispersion for Signal Leakage

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Solution Overview

Problem

Existing gate-driver-on-array (GOA) display panels face defects in the etching process, leading to stress concentration on protective layers, which results in current leakage and short circuits between signal lines, causing output malfunctions in driving circuits.

Innovation Solution

A driving circuit design incorporating a buffer layer with an overlapping and extending portion between signal lines and conductive wires, where the thickness of the overlapping portion is greater than the extending portion, disperses stress and prevents current leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If signal lines in the first layer and second layer are interlaced during the etching process, then the driving circuit can be integrated into the display panel, but defects are more likely to occur on the corners of the signal line located at the second layer

Engineering Contradiction:
Improveintegration of driving circuitVSAvoiddefects on signal line corners
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

A buffer layer is introduced as an intermediary between the first and second signal lines. This buffer layer prevents direct contact and stress concentration at the corners of the second signal line, thereby avoiding defects while maintaining the integrated driving circuit structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If a protective layer is formed over the etched signal lines, then the signal lines are protected, but stress is concentrated on the protective layer around the defects, creating defects on the film layers

Engineering Contradiction:
Improveprotection of signal linesVSAvoiddefects on protective layer
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The buffer layer serves as a mediator between the signal lines and the protective layer, distributing the stress evenly and preventing stress concentration that would otherwise create defects in the protective layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is formed beforehand to cushion and distribute the stress that will occur during subsequent protective layer formation, preventing defects before they can occur.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If etching solutions are applied through defects in the protective layer, then the manufacturing process can be completed, but the insulation layer between signal lines is etched, causing current leakage and short circuits

Engineering Contradiction:
Improvecompletion of manufacturing processVSAvoidcurrent leakage and short circuits
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The buffer layer acts as an intermediary barrier that prevents etching solutions from reaching the insulation layer through defects in the protective layer, thereby preventing current leakage and short circuits while allowing the manufacturing process to complete.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If the buffer layer has uniform thickness, then the manufacturing process is simpler, but stress is not effectively dispersed, leading to current leakage between signal lines and conductive wires

Engineering Contradiction:
Improvesimplicity of buffer layer formationVSAvoidcurrent leakage prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The buffer layer has different thicknesses in different regions: a first thickness in the overlapping region where stress concentration occurs, and a second thickness in non-overlapping regions. This local variation in thickness effectively disperses stress to prevent current leakage.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10522093B2Driving circuit and display panel
Publication Date: 2019.12.31 AU OPTRONICS CORP
  • US10522093B2 patent drawing
  • US10522093B2 patent drawing
  • US10522093B2 patent drawing

AI summary

A driving circuit including an output circuit, a pull-down module, conductive wires, at least one first signal line, and a buffer layer is provided. The conductive wires are electrically connected between the output circuit and the pull-down module. The output circuit and the pull-down module are electrically coupled to a driving control signal through the first signal line. A first overlapping region is located between the first signal line and a portion of the conductive wires. The buffer layer is disposed between the first signal line and the portion of the conductive wires. The buffer layer includes an overlapping portion and an extending portion. The overlapping portion is at least disposed in the first overlapping region. The extending portion is disposed outside the overlapping portion. A thickness of the overlapping portion is greater than a thickness of the extending portion. A display panel is also provided.