GOA Shift Register for Narrow Bezel Displays
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Solution Overview
Problem
Existing Gate Drive On Array (GOA) circuits in high-resolution display devices occupy excessive space due to multiple TFTs per shift register, hindering the achievement of a true narrow-bezel design.
Innovation Solution
A shift register with a simpler structure, comprising an input unit, output unit, scan direction selecting unit, and data latching unit, utilizing a specific configuration of transistors and inverters to achieve forward and backward scans with reduced power consumption and space occupancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If existing GOA circuit design is used with multiple TFTs per shift register, then the shift register can drive gate lines, but the occupied space becomes excessively large
Solution Approach 1:
The shift register is divided into functional modules: scan direction selecting unit, input unit, data latching unit, and output unit. Each unit performs a specific function, allowing the overall circuit to achieve the desired functionality with fewer total TFTs while reducing occupied space.
Solution Approach 2:
The scan direction selecting unit can select between forward scan and backward scan directions, making the shift register adaptable to different scanning requirements. This multi-functionality is achieved without adding excessive complexity, as the same selecting mechanism serves both directional scanning needs.
2Reliability
If more TFTs are used in each shift register to ensure proper gating, then the driving function is reliable, but the circuit complexity and occupied area increase
Solution Approach 1:
Multiple functions are merged into unified units. For example, the data latching unit combines signal storage and transfer functions, while the output unit integrates signal output and reset functions. This merging reduces the total number of discrete TFTs needed while maintaining reliable gating through coordinated operation of the merged units.
3Reliability
If COF or COG process is used for gate electrode driving circuit, then the driving function is achieved, but the bonding area and peripheral wiring space are increased
Solution Approach 1:
The gate electrode driving circuit is extracted from the separate COF or COG modules and integrated directly into the array substrate as a GOA circuit. This extraction eliminates the need for separate bonding areas and reduces peripheral wiring space, as the driving circuit shares the same substrate as the pixel array.
4Manufacturing precision
If each shift register drives only one gate line, then the control precision is maintained, but the space occupancy increases
Solution Approach 1:
The shift register employs dynamic scan direction selection, allowing the scanning direction to change based on the display requirements. This dynamic capability enables more flexible gate line driving patterns, improving space utilization while maintaining precise control over individual gate lines through the selective activation of different scanning paths.
Data Source
AI summary
A shift register comprises an input unit, an output unit, a scan direction selecting unit and a data latching unit. The scan direction selecting unit is connected to a forward-scan signal input terminal, a backward-scan signal input terminal, a positive input terminal, an inverse input terminal and the data latching unit. The input unit is connected to a first clock signal input terminal, the forward-scan signal input terminal, the backward-scan signal input terminal, a low-level signal input terminal and the data latching unit. The data latching unit is connected to a reset signal input terminal, the input unit, the output unit, the scan direction selecting unit, and a high-level signal input terminal. The output unit is connected to a second clock signal input terminal, the data latching unit, the low-level signal input terminal, the high-level signal input terminal, the reset signal input terminal, and a signal output terminal.

