GAA Transistor Air-Gap Structure for Threshold Voltage Uniformity
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Solution Overview
Problem
Integration of gate-all-around (GAA) transistor features is challenging, and existing methods do not adequately address issues such as dopant diffusion, threshold voltage uniformity, and short-channel effects in semiconductor devices.
Innovation Solution
A method is introduced to form an air gap between the inner spacer and the source/drain epitaxial structures, using cyclic deposition and etching processes to create a diamond-shaped pre-layer structure, followed by forming epitaxial layers with controlled dopant concentrations to prevent dopant diffusion and enhance mobility and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used for GAA transistors, then manufacturing simplicity is maintained, but dopant diffusion occurs leading to poor threshold voltage uniformity
Solution Approach 1:
The method performs preliminary actions by forming the air gap structure before final epitaxial layer deposition. The air gap is created through cyclic deposition and etching of diamond-shaped pre-layer structures, which establishes dopant diffusion barriers in advance, preventing threshold voltage non-uniformity before it occurs during subsequent processing.
Solution Approach 2:
The fabrication process is segmented into distinct cyclic deposition and etching steps that build the air gap structure incrementally. The diamond-shaped pre-layer structures are formed through repeated cycles of material deposition followed by selective etching, allowing precise control over the air gap geometry and position to achieve uniform dopant distribution.
2Reliability
If conventional fabrication methods are used for GAA transistors, then process simplicity is maintained, but short-channel effects are not adequately reduced
Solution Approach 1:
The method applies local quality by creating air gaps at specific locations between the inner spacer and source/drain epitaxial structures. These localized air gaps provide electrical isolation and reduce parasitic capacitance precisely where needed to mitigate short-channel effects, while maintaining simpler structures in other regions of the device.
Solution Approach 2:
The air gap structure acts as an intermediary element between the inner spacer and source/drain epitaxial structures. This intermediate air gap region provides electrical isolation and reduces unwanted interactions, thereby reducing short-channel effects without requiring direct modification of the main transistor structures.
3Reliability
If conventional fabrication methods are used for GAA transistors, then manufacturing simplicity is maintained, but parasitic capacitance is high
Solution Approach 1:
The method extracts unwanted parasitic capacitance by removing material to form air gaps between the inner spacer and source/drain epitaxial structures. By taking out the dielectric material and replacing it with air (which has negligible capacitance), the parasitic capacitance is eliminated, improving device speed and performance.
Solution Approach 2:
The air gap structure creates a porous or void region between components that would otherwise be filled with high-k dielectric material. This porous air-filled space provides electrical isolation with minimal capacitance, reducing parasitic effects while maintaining structural integrity through the cyclic deposition and etching process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves threshold voltage uniformity, reduces short-channel effects, enhances carrier mobility, and lowers parasitic capacitance, resulting in improved device performance and speed.
Implementation Method 1
using cyclic deposition and etching processes to create a diamond-shaped pre-layer structure
Implementation Method 2
forming epitaxial layers with controlled dopant concentrations to prevent dopant diffusion
Data Source
AI summary
A semiconductor device structure includes nanostructures disposed over a substrate. The structure also includes a gate structure surrounding the nanostructures. The structure also includes inner spacers disposed over opposite sides of the gate structure. The structure also includes source/drain epitaxial structure disposed over opposite sides of the nanostructures. An air gap is disposed between the inner spacers and the source/drain epitaxial structure.