GAA Backside Via Structure for Lower Parasitic Capacitance
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to enhance the electrical performance of backside vias in gate all around (GAA) transistor structures while maintaining the scalability and complexity of integrated circuits.
Innovation Solution
The method involves forming an enlarged backside via in GAA devices by patterning a sacrificial layer, using spacers to define the structure, and then removing the sacrificial layer, followed by epitaxial growth to create semiconductor layers with controlled lattice constants and doping, which are integrated with gate structures and contacts to improve electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the backside via size is increased to improve electrical performance, then parasitic capacitances are reduced and current flow is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The backside via formation process is segmented into multiple stages: first forming a preliminary via structure through the substrate, then selectively removing sacrificial material, and finally forming the enlarged via structure. This segmentation allows complex via enlargement without requiring a single complex step.
Solution Approach 2:
Sacrificial structures are formed in advance within the substrate before the final via formation. These sacrificial structures guide the subsequent via enlargement process and are removed to create the enlarged backside via, enabling precise control of the final via geometry.
2Reliability
If the backside via is enlarged to reduce parasitic capacitances, then electrical performance is improved, but the manufacturing precision requirements increase
Solution Approach 1:
Sacrificial structures serve as intermediary elements that are formed with high precision first, then used to define the final via geometry. The sacrificial material acts as a template that transfers its precisely formed geometry to the final backside via, ensuring manufacturing precision is maintained throughout the enlargement process.
Solution Approach 2:
The via dimensions are changed through controlled removal of sacrificial material rather than direct formation. By changing the parameters of the sacrificial structure formation process and then selectively removing it, the final via achieves the desired enlarged dimensions with controlled precision.
3Reliability
If more process steps are added to form the enlarged backside via, then electrical performance is improved, but the production time and complexity increase
Solution Approach 1:
Multiple functions are merged into the sacrificial structure formation process: the sacrificial structures simultaneously serve as placeholders for the final via, as etch stop layers, and as geometry templates. This merging reduces the total number of separate process steps needed to achieve the enlarged via structure.
Solution Approach 2:
The sacrificial structures self-organize to define the final via geometry through their placement and removal characteristics. The process utilizes the sacrificial material's inherent properties to automatically guide the via formation without requiring additional complex alignment or positioning steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical performance of GAA devices by reducing parasitic capacitances and improving current flow, thereby supporting the continued miniaturization and complexity of semiconductor circuits.
Implementation Method 1
epitaxial growth to create semiconductor layers with controlled lattice constants and doping
Data Source
AI summary
A device includes a channel layer, a gate structure, a first source/drain structure, a second source/drain structure, and a backside via. The gate structure surrounds the channel layer. The first source/drain structure and the second source/drain structure ate connected to the channel layer. The backside via is connected to a backside of the first source/drain structure. The backside via includes a first portion, a second portion, and a third portion. The first portion is connected to the backside of the first source/drain structure. The third portion tapers from the second portion to the first portion. A sidewall of the third portion is more inclined than a sidewall of the second portion.


