GAA Channel Thickness Layout for Driving Current Tuning

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Solution Overview

Problem

The semiconductor industry faces challenges in scaling down integrated circuit (IC) technology to achieve smaller and more complex circuits while maintaining efficient production and reducing costs, particularly in tuning driving currents through channels with varying thicknesses in gate all around (GAA) transistor structures.

Innovation Solution

The formation of integrated circuit structures involves an epitaxial stack with layers of different compositions and thicknesses, patterned to form semiconductor fins and channels, where the thickness of these layers is controlled to optimize channel performance, and an over-etching process is used to fine-tune the channel layers, allowing for the formation of gate structures that surround the channels, thereby adjusting driving currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the geometry size is decreased to achieve smaller circuits, then the functional density increases, but the manufacturing precision requirements become more stringent

Engineering Contradiction:
Improvefunctional densityVSAvoidgeometry size control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The channel structure is divided into multiple discrete channel layers with different thicknesses (first channel layer, second channel layer, third channel layer) instead of a single uniform channel. This segmentation allows independent thickness control for each layer, enabling precise tuning of driving currents while maintaining compatibility with existing fabrication processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different channel layers are assigned different thicknesses to create local variations in electrical properties. The first channel layer has a greater thickness than the second channel layer, which in turn has a greater thickness than the third channel layer. This local quality differentiation enables specific regions to have optimized driving currents tailored to their functional requirements.

Inventive Principle:
Principle #3Local quality

2Reliability

If the channel thickness is varied to tune driving currents, then the electrical performance improves, but the device complexity increases

Engineering Contradiction:
Improvedriving current tuningVSAvoidchannel layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple channel layers with different thicknesses are merged into a single integrated structure surrounded by one gate electrode. This combining approach achieves complex electrical characteristics through the stacked layers while avoiding the need for multiple separate transistor structures, thereby managing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The solution transitions from a two-dimensional planar channel to a three-dimensional stacked channel structure. By adding the vertical dimension with multiple layered channels of varying thicknesses, the design achieves enhanced driving current control without requiring additional lateral space or complex interconnections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables improved driving currents and electrical resistance management by varying the thickness of channel layers, enhancing the performance of GAA transistor structures and supporting the scaling of IC technology.

Implementation Method 1

The epitaxial stack is patterned to be a fin structure. A dummy gate structure is formed across the fin structure such that the dummy gate structure covers a first portion of the fin structure while second portions of the fin structure are exposed. The exposed second portions of the fin structure are removed. The first and second sacrificial layers are selectively removed from the gate trench while leaving the first and second channel layers suspended in the gate trench.

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS11942556B2Semiconductor device and manufacturing method thereof
Publication Date: 2024.03.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11942556B2 patent drawing
  • US11942556B2 patent drawing
  • US11942556B2 patent drawing

AI summary

A device includes a first channel layer, a second channel layer, a gate structure, a source/drain epitaxial structure, and a source/drain contact. The first channel layer and the second channel layer are arranged above the first channel layer in a spaced apart manner over a substrate. The gate structure surrounds the first and second channel layers. The source/drain epitaxial structure is connected to the first and second channel layers. The source/drain contact is connected to the source/drain epitaxial structure. The second channel layer is closer to the source/drain contact than the first channel layer is to the source/drain contact, and the first channel layer is thicker than the second channel layer.