Stacked GAA Channel Removal Using Sacrificial Spacers
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Solution Overview
Problem
Existing integrated circuit technologies face challenges in efficiently scaling transistor density through three-dimensional integration while maintaining operational efficiency, particularly in stacked semiconductor devices with channel regions.
Innovation Solution
The method involves selectively removing channel regions, such as nanoribbons, from either the upper or lower devices in a stacked gate-all-around (GAA) configuration, using a combination of conformal liners and sacrificial materials, allowing for a monolithic gate structure and minimal vertical separation between devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If channel regions are removed from stacked devices to increase transistor density, then device complexity increases, but manufacturing precision is maintained through selective etching processes
Solution Approach 1:
The stacked device structure is segmented into upper and lower devices with different channel configurations. The method selectively removes channel regions from either the upper or lower device while preserving channels in the other device, enabling independent optimization of each device's functionality and achieving higher overall transistor density through differentiated device designs
Solution Approach 2:
Sacrificial materials are deposited around the channel regions before the final device formation. These sacrificial materials serve as preliminary structures that guide the selective removal process, ensuring precise channel depopulation in the intended device regions while protecting channels in other devices from being removed
2Productivity
If vertical separation between stacked devices is reduced to increase density, then transistor density improves, but manufacturing precision challenges arise
Solution Approach 1:
Sacrificial materials act as intermediary structures between the upper and lower devices during fabrication. These materials are deposited conformally around the channels and serve as temporary spacers that define the vertical separation distance, enabling precise control of the separation while allowing subsequent selective removal to achieve the desired final configuration
Solution Approach 2:
The vertical separation between devices is controlled by adjusting the thickness and deposition parameters of the sacrificial materials. By changing the physical and chemical parameters of these intermediary layers, the manufacturing process can precisely control the vertical separation distance to optimize both device density and fabrication precision
Data Source
AI summary
A semiconductor structure includes an upper device stacked over a lower device. In an example, the upper device includes (i) a first source region, (ii) a first drain region, (iii) a body of semiconductor material extending laterally from the first source region to the first drain region, and (iv) a first gate structure at least in part wrapped around the body. In an example, the lower device includes (i) a second source region, (ii) a second drain region, and (iii) a second gate structure at least in part laterally between the second source region and the second drain region. In an example, the lower device lacks a body of semiconductor material extending laterally from the second source region to the second drain region. In another example, the upper device lacks a body of semiconductor material extending laterally from the first source region to the first drain region.