GAA Source/Drain Contact Depth Layout for Lower Rcsd
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Solution Overview
Problem
Existing gate-all-around (GAA) transistors face issues with contact-to-source/drain resistance (Rcsd) and yield degradation due to inconsistent depth of source/drain (S/D) contacts in transistors with different critical poly pitches, leading to increased resistance and short-circuits.
Innovation Solution
Implementing shallower S/D contacts in small critical poly pitch devices and deeper S/D contacts in large critical poly pitch devices to optimize contact area and avoid direct contact with higher resistance epitaxial layers and inner gate portions, thereby reducing Rcsd and improving yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform S/D contact depth is used in all devices, then manufacturing process is simple, but contact-to-source/drain resistance increases and yield degrades
Solution Approach 1:
The patent applies local quality by forming different S/D contact depths in different device regions. Specifically, first S/D contacts are formed at a first depth in first devices, while second S/D contacts are formed at a second depth in second devices. This allows each region to have optimized contact depth tailored to its specific device characteristics, thereby reducing contact-to-source/drain resistance and improving yield without requiring uniform complex processing across all devices.
2Reliability
If deeper S/D contacts are formed in small critical poly pitch devices, then contact area increases, but short-circuits with inner gate portions occur
Solution Approach 1:
The patent implements local quality by differentiating contact depth based on device type. For small critical poly pitch devices, shallower S/D contacts are formed to avoid short-circuits with inner gate portions. For large critical poly pitch devices, deeper S/D contacts are formed to maximize contact area. This spatially varying contact depth strategy optimizes each device type's performance while avoiding harmful short-circuit effects.
3Object-affected harmful factors
If shallower S/D contacts are formed in large critical poly pitch devices, then short-circuit risk decreases, but contact-to-source/drain resistance increases
Solution Approach 1:
The patent applies local quality by forming deeper S/D contacts specifically in large critical poly pitch devices where there is sufficient spacing to avoid inner gate portions. This increased contact depth maximizes the contact area and reduces contact-to-source/drain resistance in these devices, while shallower contacts are used in small critical poly pitch devices to prevent short-circuits.
4Reliability
If variable S/D contact depth processing is implemented, then device performance is optimized, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the device array into different regions (first devices and second devices) with different critical poly pitches. Each region undergoes tailored S/D contact formation processing with appropriate contact depths. This segmented approach allows optimization of device performance in each region while managing manufacturing complexity through systematic regional processing rather than attempting uniform processing for all devices.
Data Source
AI summary
A method of forming a semiconductor structure includes forming first and second fin structures in first and second regions of a substrate, respectively; forming first and second source/drain features in the first fin structure; and forming third and fourth source/drain features in the second fin structure. The method further includes forming a first gate structure between the first and second source/drain features; forming a second gate structure between the third and fourth source/drain features; and forming a first trench exposing the first source/drain feature, and forming a second trench exposing the third source/drain feature. The method further includes forming a hard mask layer in the first region of the substrate to cover the first trench; etching the third source/drain feature to extend the second trench; removing the hard mask layer; and depositing a conductive material in the first and second trenches to form first and second source/drain contacts.