GAA Source/Drain Contact Isolation Structure With CESL Sidewall Removal

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Solution Overview

Problem

The challenge in advanced technology nodes is forming isolated contacts to semiconductor device features, particularly in gate all around (GAA) transistors, due to sidewall merging during deposition, which leads to voids in isolation structures.

Innovation Solution

The contact etch stop layer (CESL) is partially or fully removed from sidewalls before depositing isolation structure material, increasing spacing and reducing sidewall merging during deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the contact etch stop layer is removed from sidewalls before depositing isolation structure material, then sidewall merging is reduced and void formation is minimized, but the manufacturing process complexity increases

Engineering Contradiction:
Improveisolation structure qualityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The contact etch stop layer is removed from sidewalls before depositing isolation structure material. This preliminary action prevents sidewall merging during deposition, ensuring proper isolation structure formation and eliminating voids that would compromise manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The contact etch stop layer is selectively removed from sidewall regions while being retained in other areas. This extraction of the layer from specific locations enables precise control over isolation structure formation without affecting the entire device structure.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If the contact etch stop layer is partially or fully removed from sidewalls, then spacing between structures is increased and sidewall merging is reduced, but material is lost

Engineering Contradiction:
Improvespacing controlVSAvoidmaterial loss
Core Design Contradiction:
Manufacturing precisionVSLoss of substance

Solution Approach 1:

The contact etch stop layer is selectively removed only from sidewall regions where isolation structures need to be formed, while being retained in other areas. This local quality approach increases spacing and prevents merging only where necessary, minimizing overall material loss.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact etch stop layer is partially removed from sidewalls rather than completely removed from the entire device. This partial action provides sufficient spacing control to prevent sidewall merging while conserving material by maintaining the layer in non-critical regions.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances yield by minimizing void formation in isolation structures, improving the manufacturing process of GAA transistors.

Implementation Method 1

The contact etch stop layer (CESL) is partially or fully removed from sidewalls before depositing isolation structure material

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

before depositing isolation structure material

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20250287643A1Field effect transistor with source/drain contact isolation structure and method
Publication Date: 2025.09.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250287643A1 patent drawing
  • US20250287643A1 patent drawing
  • US20250287643A1 patent drawing

AI summary

A device includes a substrate and a gate structure wrapping around at least one vertical stack of nanostructure channels. The device includes a source/drain region abutting the gate structure, and a source/drain contact over the source/drain region. The device includes an etch stop layer laterally between the source/drain contact and the gate structure and having a first sidewall in contact with the source/drain contact, and a second sidewall opposite the first sidewall. The device includes a source/drain contact isolation structure embedded in the source/drain contact and having a third sidewall substantially coplanar with the second sidewall of the etch stop layer.