Gate-All-Around Transistor Dual Inner Spacers for Nanosheet Insulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Effective insulation of semiconductor nanosheets in gate all around transistors is challenging, leading to damage during etching processes and compromised AC performance.
Innovation Solution
The use of sacrificial semiconductor regions with different compositions for selective etching, allowing for the formation of high-quality dielectric spacers without damaging the top nanosheets and ensuring high cladding integrity at merge points, eliminating the need for handling recess loading between regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used on semiconductor nanosheets, then the etching can be performed, but the nanosheets are damaged and insulation is compromised
Solution Approach 1:
A sacrificial semiconductor material is introduced as an intermediary layer between the etching process and the nanosheets. This sacrificial material absorbs the etching damage while protecting the nanosheets, allowing the gate to be properly formed without compromising nanosheet integrity or insulation.
Solution Approach 2:
The sacrificial semiconductor material is deposited onto the nanosheets before the gate formation process. This preliminary action creates a protective layer that prevents etching damage to the nanosheets during subsequent processing steps.
2Reliability
If single-layer spacer structures are used, then the structure is simpler, but cladding integrity at merge points is compromised
Solution Approach 1:
The spacer structure is divided into two distinct segments: a first spacer material and a second spacer material with different properties. This segmentation allows each layer to perform its specific function optimally, ensuring cladding integrity at merge points while maintaining manufacturability through a structured fabrication process.
Solution Approach 2:
Different spacer materials are used at different locations and depths of the structure. The first spacer material addresses one aspect of cladding support while the second spacer material addresses another aspect, providing locally optimized properties throughout the structure to ensure overall cladding integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves transistor performance and processing yields by preventing nanosheet damage during etching and enhancing AC performance, while ensuring robust cladding integrity.
Implementation Method 1
sacrificial semiconductor regions with different compositions for selective etching
Data Source
AI summary
A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.