GAA FET Contact Plug Structure for Higher Source/Drain Contact Area
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Solution Overview
Problem
The integration level of semiconductor devices is limited by the size reduction of planar metal oxide semiconductor field-effect transistors (MOSFETs), requiring innovative structures to enhance electrical characteristics and integration.
Innovation Solution
A semiconductor device with a gate-all-around type field effect transistor (FET) structure, featuring a substrate with an active region, multiple channel layers, and a contact plug with a metal-semiconductor compound layer, barrier layer, and plug conductive layer, where the barrier layer ends protrude towards the gate structure, increasing the contact area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the contact area between contact plug and source/drain region is increased, then electrical characteristics are improved, but device complexity increases
Solution Approach 1:
The contact plug is divided into multiple distinct layers: a metal-semiconductor compound layer, a barrier layer, and a plug conductive layer. Each layer serves a specific function, with the barrier layer further segmented into multiple ends at different heights. This segmentation allows optimization of electrical characteristics without requiring a monolithic complex structure.
Solution Approach 2:
The barrier layer is designed with multiple ends protruding at different vertical heights, creating a stepped configuration. This vertical dimensionality increase allows the barrier layer to contact multiple channel layers at different levels, effectively increasing the total contact area and improving electrical characteristics while maintaining manufacturing feasibility.
2Productivity
If multiple channel layers are stacked vertically, then integration level is increased, but manufacturing precision requirements increase
Solution Approach 1:
The barrier layer is segmented into multiple ends (first end, second end, third end, fourth end) with different protrusion heights. Each end aligns with and contacts a specific channel layer, allowing precise vertical stacking of multiple channel layers while maintaining manufacturability through selective etching and deposition processes.
Solution Approach 2:
Different regions of the barrier layer have different heights and functions. The first and second ends protrude higher to contact upper channel layers, while the third and fourth ends are lower to contact lower channel layers. This local variation in quality enables precise control of electrical connections in a vertically integrated structure.
Data Source
AI summary
A semiconductor device includes an active region on a substrate, a plurality of channel layers spaced apart from each other, a gate structure on the substrate, a source/drain region on at least one side of the gate structure, and a contact plug connected to the source/drain region. The contact plug includes a metal-semiconductor compound layer and a barrier layer on the metal-semiconductor compound layer. The contact plug includes a first inclined surface and a second inclined surface positioned where the metal-semiconductor compound layer and the barrier layer directly contact each other. The barrier layer includes first and second ends protruding towards the gate structure. The first and second ends are positioned at a level higher than an upper surface of an uppermost channel layer. An uppermost portion of the metal-semiconductor compound layer is positioned at a level higher than an upper surface of the source/drain region.