Semiconductor Liner Epitaxy for GAA FET Material Loss
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Solution Overview
Problem
Gate-all-around (GAA) FETs experience semiconductor material loss during formation, leading to reduced distal thickness of semiconductor layers and increased access resistance due to imperfect etch selectivity between semiconductor and sacrificial materials, resulting in a decreased contact area with source/drain structures.
Innovation Solution
Epitaxially growing a liner of semiconductor material onto the semiconductor layer surfaces exposed by trenches to compensate for material loss and restore distal thickness, thereby reducing access resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If etching is performed to form recesses in the sacrificial layer, then the sacrificial layer is removed to enable source/drain structure formation, but semiconductor material loss occurs due to imperfect etch selectivity
Solution Approach 1:
A liner of semiconductor material is grown epitaxially on the semiconductor layer surfaces before the etching process. This preliminary action creates a protective layer that compensates for material loss during subsequent etching, ensuring the distal thickness is restored or increased after the sacrificial layer is removed.
Solution Approach 2:
The distal thickness of the semiconductor layer is adjusted by controlling the thickness of the epitaxially grown liner. By changing the growth parameters of the liner, the final distal thickness can be optimized to compensate for etch-induced material loss while maintaining proper device geometry.
2Manufacturing precision
If the distal thickness of semiconductor layers is reduced due to material loss, then etch selectivity is insufficient, but access resistance increases due to decreased contact area
Solution Approach 1:
The epitaxial liner is grown in advance before etching, creating a compensatory layer that ensures sufficient distal thickness remains after the sacrificial layer is removed. This maintains adequate contact area between the semiconductor layer and source/drain structures, thereby keeping access resistance at acceptable levels even when etch selectivity is imperfect.
3Loss of substance
If perfect etch selectivity is achieved, then no semiconductor material loss occurs, but this is not realistic in actual processing
Solution Approach 1:
The epitaxial liner acts as an intermediary layer between the semiconductor layer and the etching process. Instead of relying on perfect etch selectivity between the semiconductor and sacrificial materials, the liner serves as a buffer that compensates for material loss, making the process more robust and less sensitive to etch selectivity variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor material liner effectively compensates for material loss, partially restoring the distal thickness of semiconductor layers and decreasing access resistance, as evident from transmission electron microscopy images, improving the contact area and reducing parasitic resistance.
Implementation Method 1
epitaxially growing a liner of the semiconductor material onto surfaces of the semiconductor layer exposed by the trench
Data Source
AI summary
Example embodiments relate to counteracting semiconductor material loss during semiconductor structure formation. One embodiment includes a method for forming a semiconductor structure. The method includes providing a structure. The structure includes a substrate. The structure also includes a layer stack on the substrate. The layer stack includes at least one semiconductor layer of a semiconductor material and at least one sacrificial layer under the semiconductor layer. Further, the structure includes a trench through the layer stack. The further also includes forming a recess in the layer stack by etching a portion of the sacrificial layer exposed by the trench. The etching includes a preferential etch of the sacrificial layer with respect to the semiconductor layer. Additionally, the method includes epitaxially growing a liner of the semiconductor material onto surfaces of the semiconductor layer exposed by the trench.