GAA FinFET Oxide Thickness Control via Differential Thermal Oxidation
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Solution Overview
Problem
Current manufacturing processes for gate-all-around (GAA) FinFETs face challenges in achieving optimal oxidation rates for different semiconductive materials, leading to suboptimal device performance due to variations in oxidation rates and layer thicknesses, which affect electrical isolation and channel quality.
Innovation Solution
The process involves using novel thermal oxidation techniques to form GAA FinFETs by simultaneously oxidizing materials with different oxidation rates, resulting in a thicker oxide layer between source and drain regions and a thinner oxide layer around the channel, allowing for self-aligned gate formation and improved device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If simultaneous oxidation is used to form oxide layers on different semiconductive materials, then device performance is improved through better electrical isolation and channel quality, but manufacturing precision becomes difficult to control due to variations in oxidation rates
Solution Approach 1:
The patent applies local quality by creating different oxide layer thicknesses at different locations on the fin structure. The first oxide layer formed on the sacrificial semiconductive material has a first thickness, while the second oxide layer formed on the channel-forming semiconductive material has a second thickness that is less than the first thickness. This spatial variation in oxide thickness optimizes both electrical isolation (thicker oxide) and channel quality (thinner oxide) simultaneously.
Solution Approach 2:
The patent utilizes parameter changes by exploiting the different oxidation rates of various semiconductive materials. By controlling oxidation conditions and material composition, the process achieves differential oxide growth where the sacrificial material oxidizes faster than the channel-forming material, enabling self-aligned gate formation and optimal device performance despite the inherent manufacturing challenge of controlling thickness uniformly.
2Productivity
If faster oxidation rates are used to improve manufacturing efficiency, then productivity increases, but manufacturing precision deteriorates due to difficulty in controlling oxide layer thickness
Solution Approach 1:
The patent applies self-service through self-aligned gate formation. The differential oxidation process automatically creates the desired structure where the faster-oxidizing sacrificial material forms a thicker oxide layer that serves as a mask, while the slower-oxidizing channel material forms a thinner oxide layer. This self-organizing process eliminates the need for additional alignment steps and maintains precision despite fast oxidation rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality of the oxide layers, improves electrical isolation, and increases transconductance, carrier mobility, and sub-threshold swing, while maintaining ease of implementation in existing manufacturing flows.
Implementation Method 1
The first semiconductive material and the second semiconductive material are oxidized, forming a first oxide comprising a first thickness on the first semiconductive material and a second oxide comprising a second thickness on the second semiconductive material
Data Source
AI summary
A semiconductor device may include a fin disposed over a workpiece. The fin may include: a first semiconductive material disposed over the workpiece; an oxide of the first semiconductive material disposed over the first semiconductive material; a second conductive material disposed over and spaced apart from the oxide of the first semiconductive material; a first insulating material disposed around and lining the second semiconductive material; a conductive material disposed around the first insulating material; and a second insulating material disposed between the oxide of the first semiconductive material and a portion of the conductive material facing the workpiece, the second insulating material further lining sidewalls of the conductive material.


