GAA Gate Conductive Structure for Reliable Gate-to-Contact Landing

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Solution Overview

Problem

The integration of multi-gate devices in semiconductor manufacturing is challenging due to increased complexity and the need for advanced manufacturing processes that can efficiently produce high-performance, low-power integrated circuits with smaller feature sizes.

Innovation Solution

The method involves forming gate-all-around transistor structures using a series of semiconductor material layers and patterning processes, including double-patterning or multi-patterning techniques, to create nanostructures with gate structures wrapping around fins, and forming conductive structures with specific thickness profiles to ensure proper connection between gate and contact structures, reducing height differences and preventing disconnection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multi-gate devices are integrated to improve gate control and reduce short-channel effects, then device performance is improved, but fabrication complexity increases

Engineering Contradiction:
Improvegate controlVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The fabrication process is divided into multiple patterning stages, where mandrels are formed first, then spacers are deposited and patterned iteratively to create the complex multi-gate structure. This segmentation allows the complex device to be built through simpler, repeated steps rather than a single complex process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mandrel structures are formed in advance as templates before the actual gate structures are built. These preliminary mandrels guide the subsequent spacer deposition and pattern transfer processes, ensuring precise alignment and reducing fabrication complexity.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If device dimensions are scaled down to improve production efficiency and lower costs, then productivity increases, but manufacturing complexity increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The spacer structures self-align to the mandrels through conformal deposition, automatically ensuring precise positioning without requiring additional alignment steps. This self-service mechanism simplifies manufacturing while enabling scaled-down dimensions.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention uses vertical spacer deposition on horizontal mandrels, then rotates the pattern 90 degrees for subsequent spacer formation. This dimensional transformation allows complex 2D patterns to be created through simpler 1D deposition steps repeated in different orientations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional single-patterning processes are used, then manufacturing is simpler, but alignment precision and connection reliability deteriorate

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patterning process is segmented into multiple iterations of spacer deposition and etch steps, with each iteration improving the precision of the final pattern. This multi-stage approach achieves high alignment precision that would be impossible with single-patterning methods.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Spacer structures are nested around mandrels in multiple layers, with each spacer generation building upon the previous one. This nested construction ensures precise alignment between different pattern elements while maintaining manufacturing feasibility.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20240222433A1Semiconductor structure with conductive structure and method for manufacturing the same
Publication Date: 2024.07.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240222433A1 patent drawing
  • US20240222433A1 patent drawing
  • US20240222433A1 patent drawing

AI summary

Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes nanostructures spaced apart from each other in a first direction and a gate structure formed over and around the nanostructures. The semiconductor structure further includes a gate spacer covering a sidewall of the gate structure and a source/drain structure attached to the nanostructures in a second direction. The semiconductor structure further includes a contact spaced apart from the gate structure by the gate spacer in the second direction and a first conductive structure landing over the gate structure. The semiconductor structure further includes a second conductive structure formed over the gate spacer. In addition, a portion of the second conductive structure is sandwiched between the first conductive structure and the contact.