Multi-Thickness GAA Gate Dielectrics for Logic and High-Voltage Integration
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Solution Overview
Problem
Conventional semiconductor manufacturing processes face challenges in producing thick-gate dielectric devices using gate-all-around (GAA) technology, as the limited vertical space between nanosheets leads to increased parasitic capacitance in logic devices, making it difficult to accommodate high-voltage devices without compromising logic device performance.
Innovation Solution
The solution involves creating a semiconductor device with a first gate structure having a thinner gate dielectric and a second gate structure with a thicker gate dielectric on the same wafer, allowing for reduced vertical spacing in logic devices while enabling higher voltage operations in high-voltage devices by adjusting the number and spacing of channels and dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick-gate dielectric is used in GAA devices, then high-voltage device performance is improved, but vertical space increases causing unwanted parasitic capacitance in logic devices
Solution Approach 1:
The patent applies local quality by implementing different gate dielectric thicknesses in different regions of the same semiconductor device. Specifically, the gate dielectric structure includes a first thickness in a first region (for high-voltage devices) and a second thickness in a second region (for logic devices), allowing each region to be optimized for its specific function without compromising the other.
2Object-affected harmful factors
If vertical spacing is minimized for logic devices, then parasitic capacitance is reduced, but space for thick-gate dielectric in high-voltage devices is limited
Solution Approach 1:
The patent implements local quality by creating region-specific gate dielectric thicknesses within the same GAA structure. The gate dielectric has a first thickness in the first region to accommodate high-voltage requirements, and a second thickness in the second region to minimize parasitic capacitance for logic devices, thereby satisfying both conflicting requirements in their respective locations.
3Ease of manufacture
If only thin-gate or core devices are offered in advanced GAA technologies, then process conflicts are minimized, but design complexity increases and high-voltage devices are not available
Solution Approach 1:
The patent applies universality by designing a single GAA device structure that can serve multiple functions - both high-voltage devices and logic devices - within the same device. This is achieved through the multi-thickness gate dielectric structure that accommodates different electrical requirements in different regions, eliminating the need for separate device types and reducing design complexity.
Data Source
AI summary
Disclosed are semiconductor devices and fabrication methods. A semiconductor device includes a first gate structure including a first set of channels disposed along a first direction through a first gate metal, and a first set of gate dielectrics disposed between the first set of channels and the first gate metal. The first set of gate dielectrics each have a first thickness. The semiconductor device further includes a second gate structure including a second set of channels disposed along the first direction through a second gate metal, and a second set of gate dielectrics disposed between the second set of channels and the second gate metal. The second set of gate dielectrics each have a second thickness. The second thickness is greater than the first thickness and the second set of channels is less in number than the first set of channels.