GAA Metal Gate Recess Stop for Lower Overlap Capacitance
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Solution Overview
Problem
The increasing miniaturization of IC devices leads to smaller areas for forming contacts and interconnects, resulting in higher routing complexity and parasitic resistance and capacitance, which negatively impact manufacturing costs and performance.
Innovation Solution
A gate-all-around (GAA) field effect transistor (FET) structure is developed, featuring a vertical metal gate structure with a recess stop material to control the metal gate height precisely, reducing gate-to-contact overlap capacitance and improving manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the metal gate height is increased to improve gate control, then the gate control capability is improved, but the gate-to-contact overlap capacitance increases
Solution Approach 1:
The metal gate is segmented into two distinct portions: a first portion over the channel that provides gate control, and a second portion extending beyond the channel that would otherwise contribute to harmful capacitance. This segmentation allows the gate control function to be maintained while reducing the capacitance between the gate and source/drain contacts.
Solution Approach 2:
The harmful portion of the metal gate that extends beyond the channel region is effectively extracted or removed. The recess stop structure enables selective removal of metal gate material in the second portion, eliminating the source of gate-to-contact overlap capacitance while preserving the essential gate control function in the first portion.
2Object-generated harmful factors
If the metal gate height is reduced to decrease gate capacitance, then the gate-to-contact overlap capacitance is reduced, but the gate control capability deteriorates
Solution Approach 1:
The metal gate structure exhibits local quality variations through the recess stop. The first portion over the channel maintains sufficient height for effective gate control, while the second portion beyond the channel is reduced in height to minimize capacitance. This local differentiation allows simultaneous optimization of both gate control and capacitance reduction.
3Productivity
If the IC device size is reduced to increase integration density, then the miniaturization is achieved, but the available area for contacts and interconnects decreases
Solution Approach 1:
The gate structure transitions from a conventional planar configuration to a vertical three-dimensional structure with multiple portions at different heights and horizontal positions. This dimensional change allows the gate to effectively control the channel while minimizing its footprint in the plane where contacts and interconnects are formed, thereby preserving area for other components.
Data Source
AI summary
A gate-all-around (GAA) field effect transistor (FET) structure and method for making the same is disclosed. In an aspects, a GAA FET includes a gate structure, extending in a first horizontal direction and disposed between first and second source/drain (S/D) epitaxial (EPI) structures and having a vertical metal gate structure with a first portion containing a set of vertically-stacked, horizontal channels connecting the first and second EPI S/D structures through the vertical metal gate structure, and a second portion having no channels. The GAA FET also includes a metal gate recess stop structure extending in the first horizontal direction and disposed above the first portion of the vertical metal gate structure, and a frontside inter-layer dielectric (ILD) layer disposed above the vertical metal gate structure and the first metal gate recess stop structure.