GAA Transistor Gate Stack for Threshold Voltage Regulation
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Solution Overview
Problem
The integration density of dynamic random access memory (DRAM) is increasing, requiring improved arrangement and size of transistors in memory arrays, and the threshold voltage of gate-all-around transistors is low, necessitating further improvements in transistor structure to regulate threshold voltage effectively.
Innovation Solution
A semiconductor device with a transistor structure that includes a gate dielectric layer, a gate conductive layer, and a first threshold voltage regulating layer located between the gate dielectric layer and the gate conductive layer, where the first threshold voltage regulating layer is made of materials like molybdenum trioxide and is used to increase the threshold voltage of the transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If gate-all-around transistor structure is used to increase integration density, then integration density is improved, but threshold voltage becomes too low
Solution Approach 1:
The gate structure is segmented into multiple functional layers: gate dielectric layer, first threshold voltage regulating layer, and gate conductive layer. This segmentation allows independent optimization of each layer's function, enabling the gate-all-around structure to achieve both high integration density and proper threshold voltage control through specialized layers.
Solution Approach 2:
The first threshold voltage regulating layer acts as an intermediary between the gate dielectric layer and gate conductive layer. This intermediate layer specifically addresses the threshold voltage issue by providing charge regulation functionality, allowing the gate-all-around structure to maintain low capacitance for high density while achieving proper threshold voltage through the mediating regulating layer.
2Productivity
If transistor size is reduced to increase integration density, then integration density is improved, but threshold voltage control becomes difficult
Solution Approach 1:
Different layers of the gate structure are assigned different local qualities and functions: the gate dielectric layer provides insulation, the first threshold voltage regulating layer provides charge regulation specifically for threshold voltage control, and the gate conductive layer provides electrical connection. This local specialization allows reduced transistor size while maintaining threshold voltage control through the dedicated regulating layer.
Solution Approach 2:
The invention changes the electrical parameters of the gate structure by introducing the first threshold voltage regulating layer with specific dielectric properties and charge characteristics. This parameter change enables the scaled-down transistor to achieve proper threshold voltage by modifying the gate structure's electrical characteristics rather than relying solely on geometric dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The introduction of the first threshold voltage regulating layer effectively increases the threshold voltage of the transistor, thereby improving the electrical properties of the semiconductor device and enhancing the integration density of DRAM.
Implementation Method 1
the first threshold voltage regulating layer is configured to regulate a threshold voltage of the transistor
Implementation Method 2
the gate dielectric layer is in contact with the channel region
Data Source
AI summary
A semiconductor device, a manufacturing method therefor, and an electronic apparatus are provided. The semiconductor device includes at least one transistor, where each transistor includes a first source/drain, a second source/drain, a channel region, and a gate structure. The channel region is located between the first source/drain and the second source/drain. The gate structure includes a gate dielectric layer in contact with the channel region, a gate conductive layer, and a first threshold voltage regulating layer located between the gate dielectric layer and the gate dielectric layer, where the first threshold voltage regulating layer is configured to regulate a threshold voltage of the transistor. The embodiments of the present disclosure can improve the electrical properties of the semiconductor device.


