High-Temperature GAA Implant for Threshold Voltage Tuning

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Solution Overview

Problem

Tuning the threshold voltage of gate-all-around (GAA) MOSFET devices is challenging due to limited space between nanosheets, which restricts traditional work function metal deposition and channel doping methods, leading to mobility degradation and high risk of damage to nanosheet channels and interfaces.

Innovation Solution

A high-temperature ion implant or plasma doping process is used to dope the sidewalls of the nanosheet structure in GAA devices, followed by a thermal process to drive dopants into the channel, thereby improving threshold voltage tuning without excessive damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional work function metal deposition is used for threshold voltage tuning, then threshold voltage can be adjusted, but the limited spacing between nanosheets restricts the deposition process and reduces manufacturing precision

Engineering Contradiction:
Improvethreshold voltage tuning precisionVSAvoidspacing between nanosheets
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent changes the fundamental parameter of the doping approach by using ion implantation instead of metal deposition. This allows threshold voltage tuning without being constrained by the physical spacing between nanosheets, as ions can be directed through the source/drain cavity to reach the channel region regardless of nanosheet spacing.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The source/drain cavity serves as an intermediary pathway that enables ion implantation to reach the channel region. By creating this cavity and using it as a conduit, the process bypasses the limitation of narrow nanosheet spacing while maintaining precise dopant delivery to the intended location.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If channel doping is performed after dummy SiGe removal, then threshold voltage can be tuned, but there is high risk of damage to nanosheet channels and interfaces

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidnanosheet channel integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent performs ion implantation before removing the dummy SiGe layer, rather than after. This preliminary action allows dopants to be introduced into the channel region while the SiGe layer is still present, which protects the nanosheet interfaces during the doping process. The SiGe layer is then removed to complete the device structure without having exposed the interfaces to damaging post-doping processing.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively tunes the threshold voltage of GAA devices with reduced risk of damage to the channels and interfaces, while also reducing process costs and improving doping uniformity.

Implementation Method 1

performing an implant by directing ions to the GAA stack, through the S/D cavity, wherein the implant is performed at a temperature greater than 500° Celsius

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

followed by a thermal process to drive dopants into the channel

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20250194127A1High-temperature implant for gate-all-around devices
Publication Date: 2025.06.12 APPLIED MATERIALS INC
  • US20250194127A1 patent drawing
  • US20250194127A1 patent drawing
  • US20250194127A1 patent drawing

AI summary

Approaches herein provide devices and methods with threshold voltage tunning for gate-all-around (GAA) based pFET or nFET devices. One method may include forming a GAA stack including a plurality of alternating first layers and second layers, wherein the GAA stack is positioned atop a bottom dielectric isolation (BDI) layer, and forming a source/drain (S/D) cavity by etching the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, and performing an implant by directing ions to the GAA stack, through the S/D cavity, wherein the implant is performed at a temperature greater than 500° Celsius. The method may further include forming a S/D material in the S/D cavity following the implant.