GAA Transistor Inner Spacer Scheme for Selective Sacrificial Etching

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Solution Overview

Problem

In the fabrication of gate-all-around (GAA) transistors, the etching selectivity between inner spacer features and sacrificial materials is often unsatisfactory, leading to inconsistent gate structure profiles and potential damage to epitaxial source/drain features during the removal of sacrificial materials.

Innovation Solution

A method involving the formation of a fin-shaped structure with channel and sacrificial layers, followed by deposition of a dummy gate stack and spacers, selective removal of sacrificial layers, and deposition of dielectric dummy layers to form inner spacer recesses, ensuring controlled etching and protection of source/drain features, with specific etching processes to maintain structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching processes are used to remove sacrificial materials, then the sacrificial materials can be removed, but the etching selectivity between inner spacer features and sacrificial materials is unsatisfactory, leading to inconsistent gate structure profiles

Engineering Contradiction:
Improvegate structure profile consistencyVSAvoidetching selectivity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A dummy layer is deposited over the channel members before forming inner spacers. This dummy layer acts as an intermediary that enables selective etching of sacrificial materials while protecting the inner spacer features. The dummy layer is selectively removed after the inner spacers are formed, allowing precise control over the etching process and consistent gate structure profiles.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy layer is deposited in advance before the inner spacer formation process. This preliminary action prepares the structure for subsequent selective etching operations, ensuring that the sacrificial materials can be removed with high selectivity while maintaining the integrity of the inner spacer features and consistent gate profiles.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If sacrificial materials are removed to form gate-all-around structures, then the gate can surround the channel region, but epitaxial source/drain features may be damaged during the removal process

Engineering Contradiction:
Improvegate structure configurationVSAvoiddamage to epitaxial source/drain features
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The dummy layer serves as a protective intermediary during the sacrificial material removal process. It is selectively etched along with or after the sacrificial materials, but its presence during the process protects the epitaxial source/drain features from damage while still allowing the gate to be formed around the channel region.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy layer is deposited beforehand to cushion and protect the epitaxial source/drain features during the potentially damaging sacrificial material removal process. This prior cushioning ensures that the gate-all-around structure can be formed without harming the delicate epitaxial features.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If inner spacer features are formed with poor etching selectivity, then the fabrication process can proceed, but the gate structure profiles become inconsistent

Engineering Contradiction:
Improvefabrication process continuityVSAvoidgate structure profile consistency
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The dummy layer acts as a mediator that enables high etching selectivity between sacrificial materials and inner spacer features. By depositing this intermediate layer, the process maintains both productivity (continuous fabrication) and manufacturing precision (consistent gate profiles) through controlled selective etching.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260032976A1Gate-all-around devices
Publication Date: 2026.01.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260032976A1 patent drawing
  • US20260032976A1 patent drawing
  • US20260032976A1 patent drawing

AI summary

A method of the present disclosure includes forming over a substrate a stack having channel layers interleaved by sacrificial layers, patterning the stack and the substrate to form a fin-shaped structure, forming a dummy gate stack, depositing a gate spacer layer over the dummy gate stack, recessing a source/drain region of the fin-shaped structure to form a source/drain trench, releasing the channel layers as channel members, depositing a dummy layer over the channel members, recessing the dummy layer to form inner spacer recesses and a bottom dummy feature over a bottom surface of the source/drain trench, forming inner spacer features in the inner spacer recesses, forming a bottom isolation layer over the bottom dummy feature, forming a source/drain feature over the bottom dummy feature, removing the dummy gate stack, removing the dummy layer, and forming a gate structure to wrap around each of the channel members.