GAA Gate Structure with Inner Spacers for Profile Consistency
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Solution Overview
Problem
Existing methods for fabricating multi-gate MOSFET devices have not effectively addressed the issue of inconsistent gate structure profiles and potential damage to epitaxial components during the epitaxial source/drain features during the epitaxial process, which can result in reduced performance and reliability.
Innovation Solution
A method for forming a gate-all-around (GAA) transistor using a replacement gate process, where a dummy gate stack is formed and subsequently replaced with a functional gate structure, utilizing inner spacer features to define the gate structure and protect epitaxial source/drain features, ensuring consistent profile formation and preventing damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used for multi-gate MOSFET devices, then the manufacturing process is simpler, but the gate structure profile consistency deteriorates and epitaxial components are damaged
Solution Approach 1:
The method forms inner spacer features and a protective layer over the epitaxial source/drain features before performing the epitaxial process. This preliminary action establishes the gate structure profile definition and protects the epitaxial components from damage during subsequent processing steps, ensuring consistent profiles without compromising the fabrication flow
Solution Approach 2:
The inner spacer features serve as intermediary structures that define the gate structure profile. These spacers act as a mediating element between the fabrication process and the final gate structure, enabling precise profile control. Additionally, the protective layer formed over the epitaxial features acts as an intermediary shield that prevents damage during epitaxial processing
2Productivity
If conventional fabrication methods are used for multi-gate MOSFET devices, then the manufacturing process is faster, but epitaxial source/drain features are damaged
Solution Approach 1:
The protective layer is formed over the epitaxial source/drain features before the epitaxial process, providing advance protection against damage. This preliminary protective measure allows the manufacturing process to proceed without compromising component integrity, maintaining productivity while ensuring reliability
Solution Approach 2:
The protective layer acts as a cushioning barrier formed beforehand to absorb or prevent damage to the epitaxial source/drain features during the epitaxial process. This prior cushioning ensures that the features remain intact throughout manufacturing, preserving both productivity and reliability
Data Source
AI summary
A semiconductor structure according to the present disclosure includes a base fin over a substrate and comprising a first channel region, a second channel region, and a source/drain region between the first channel region and the second channel region, a first plurality of nanostructures disposed over the first channel region, a second plurality of nanostructures disposed over the second channel region, a first plurality of inner spacer features interleaving the first plurality of nanostructures, a second plurality of inner spacer features interleaving the second plurality of nanostructures, a bottom epitaxial layer over the source/drain region, a bottom isolation layer over the bottom epitaxial layer such that the bottom isolation layer interfaces a bottommost one of the first plurality of inner spacer features and a bottommost one of the second plurality of inner spacer features, and a source/drain feature disposed over the bottom isolation layer.