Gate-All-Around Isolation Protection Against Over-Etching
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Solution Overview
Problem
GAA transistors face issues with isolation features being excessively etched during fabrication, leading to electrical shorts and increased parasitic capacitance due to the recessed isolation features between fin-shaped structures.
Innovation Solution
A protection layer is deposited over the isolation feature before forming the dummy gate stack, which is later replaced by a functional gate structure, protecting the isolation feature from excessive etching and maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the isolation feature is etched during fabrication to separate fin-shaped structures, then device isolation is improved, but the isolation feature becomes excessively recessed leading to electrical shorts and increased parasitic capacitance
Solution Approach 1:
A protection layer is deposited over the isolation feature before the etching process that forms the trench isolation. This protection layer remains in place during the etching process, preventing the etchant from excessively attacking the isolation feature. The protection layer is applied in advance (preliminary action) to protect the isolation feature from the harmful etching effect, thereby maintaining the isolation feature at the correct depth and preventing electrical shorts and excessive parasitic capacitance.
2Reliability
If the isolation feature is deeply etched to improve electrical isolation between devices, then isolation performance is enhanced, but parasitic capacitance increases due to recessed isolation features
Solution Approach 1:
The protection layer is deposited over the isolation feature before the trench formation process. This preliminary protective action ensures that the isolation feature is not excessively recessed during etching, thereby maintaining the correct isolation depth and preventing the formation of deep recesses that would generate excessive parasitic capacitance.
3Reliability
If the isolation feature is deeply etched to separate fin structures, then structural separation is improved, but electrical shorts occur due to excessive recess
Solution Approach 1:
The protection layer is applied to the isolation feature before the etching process that creates the trench isolation. This preliminary protective measure prevents the etchant from excessively removing the isolation feature material, thereby maintaining the isolation feature at the appropriate depth and preventing electrical shorts between adjacent fin structures while still achieving the required structural separation.
Data Source
AI summary
Semiconductor structures and processes for forming the same provided. A semiconductor structure according to the present disclosure includes an insolation feature, a first base fin and a second base fin extending through and rising above the isolation feature, a first active region disposed over the first base fin, a second active region disposed over the second base fin, a gate structure disposed over the first active region, the second active region, and the isolation feature, and a protection layer sandwiched between the gate structure and the isolation feature.