GAA LDMOS Nanosheet Structure for Advanced Node Scaling

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Solution Overview

Problem

Fin-based field effect transistors (LDMOS) have struggled to scale effectively as process nodes continue to shrink, particularly at 3 nm and 2 nm process nodes, limiting their scalability and performance.

Innovation Solution

The development of a Gate All-Around (GAA) Laterally-Diffused Metal-Oxide Semiconductor (LDMOS) field effect transistor (FET) architecture, which includes a substrate, nanosheet stacks, a gate, and epitaxial layers, allowing for improved scalability and performance by wrapping the gate around the nanosheet channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fin-based LDMOS structures are used, then scalability and space savings are achieved, but the structures are unable to scale at advanced 3 nm and 2 nm process nodes

Engineering Contradiction:
ImprovescalabilityVSAvoidperformance at advanced nodes
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent transitions from planar fin-based structures to vertically stacked nanosheet channels, adding a vertical dimension to the device architecture. This enables scaling at advanced process nodes by utilizing the third dimension for multiple channels while maintaining lateral pitch, effectively resolving the scalability limitation of conventional fin-based LDMOS

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If gate all-around nanosheet structure is implemented, then short channel effects are reduced and DC performance is enhanced, but device complexity increases

Engineering Contradiction:
ImproveDC performance and short channel controlVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure completely surrounds each nanosheet channel in a nested configuration, with the gate wrapping around the channel from all sides. This gate-all-around approach provides superior electrostatic control and short channel effect suppression while the modular stacked architecture allows systematic fabrication, balancing performance improvement with manageable device complexity

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250040169A1Gate All-Around Laterally Diffused Metal-Oxide Semiconductor Field Effect Transistor
Publication Date: 2025.01.30 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US20250040169A1 patent drawing
  • US20250040169A1 patent drawing
  • US20250040169A1 patent drawing

AI summary

A gate all-around laterally diffused metal-oxide semiconductor device is provided. An apparatus includes a substrate, two or more first sheets disposed on the substrate, a gate disposed on the substrate and at least part of the two or more first sheets, and a first epitaxial layer disposed on the substrate on a first side of the gate and at least part of the two or more first sheets. At least part of the two or first more sheets extends longitudinally from the gate to the first epitaxial layer.