GAA Metal Gate Stack for Lower Resistance and Vt Control
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Solution Overview
Problem
Existing gate-all-around (GAA) devices face challenges in reducing gate resistance without degrading performance, as they continue to scale down in integrated circuit technology.
Innovation Solution
The method involves forming a multigate device with p-type and n-type GAA transistors, where a gate dielectric layer is formed around semiconductor layers in the gate trench, and specific work function layers and metal fill layers are deposited to reduce gate resistance while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If GAA devices are scaled down to improve production efficiency and lower costs, then productivity increases, but gate resistance increases degrading device performance
Solution Approach 1:
The patent employs a composite gate structure consisting of multiple layers including a first work function layer (e.g., titanium nitride), a second work function layer (e.g., tungsten), and a metal fill layer (e.g., copper or aluminum). This composite material approach allows optimization of both gate resistance and threshold voltage control, enabling scaled device dimensions while maintaining performance.
Solution Approach 2:
The patent implements different material compositions and properties at different locations within the gate structure. The work function layers are positioned to control threshold voltage, while the metal fill layer is optimized for low resistance. This local differentiation of material properties enables simultaneous optimization of resistance and performance in scaled devices.
2Reliability
If gate resistance is reduced by increasing metal fill to improve performance, then electrical conductivity increases, but threshold voltage control degrades
Solution Approach 1:
The gate structure is segmented into distinct functional layers: work function layers for threshold voltage control and a metal fill layer for resistance reduction. This segmentation allows independent optimization of each function without compromising the other, as each layer can be tailored with specific material properties and thicknesses.
Solution Approach 2:
The patent utilizes parameter changes in material composition, layer thickness, and material properties to achieve the desired balance. By adjusting the thickness and material composition of each layer, the gate structure can be tuned to provide both low resistance and precise threshold voltage control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces gate resistance by up to 70% while mitigating threshold voltage shifts, thereby enhancing the performance and scalability of GAA devices.
Implementation Method 1
a gate dielectric layer is formed around semiconductor layers in the gate trench
Implementation Method 2
specific work function layers and metal fill layers are deposited to reduce gate resistance while maintaining performance
Data Source
AI summary
Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming an n-type work function layer in a gate trench in a gate structure, wherein the n-type work function layer is formed around first channel layers in a p-type gate region and around second channel layers in an n-type gate region, forming a first metal fill layer in a first gate trench over the n-type work function layer in the p-type gate region and in a second gate trench over the n-type work function layer in the n-type gate region, removing the first metal fill layer from the p-type gate region, removing the n-type work function layer from the p-type gate region, forming a p-type work function layer in the first gate trench of the p-type gate region, and forming a second metal fill layer in the first gate trench of the p-type gate region.