GAA Semiconductor Threshold Tuning With Interfacial Dipole Layers
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Solution Overview
Problem
In advanced semiconductor technology, achieving multiple threshold voltages in transistors with a gate-all-around (GAA) structure is challenging due to the dimensional shrinkage of semiconductor devices, which makes it difficult to control the concentration of impurities in channel layers and results in insufficient spacing for work function metal layers, leading to relatively low threshold voltage values.
Innovation Solution
A method for manufacturing semiconductor structures with multiple threshold voltages involves forming patterned structures with channel layers separated by a controlled distance, using a diffusion barrier layer and dipole elements to adjust the impurity concentration in the interfacial layers, allowing for the same thickness of work function metal layers across devices with varying threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the critical dimension of transistors is shrunk to increase integration density, then the number of transistors per unit area is improved, but the spacing between channel layers becomes insufficient leading to low threshold voltage
Solution Approach 1:
The patent applies local quality by introducing dipole layers with specific orientations at different locations (first dipole layer at first interface, second dipole layer at second interface) to create localized electric field effects. This allows different regions of the channel to have tailored impurity concentrations and threshold voltages, resolving the contradiction by enabling precise local control rather than uniform adjustment across the entire device.
Solution Approach 2:
The patent transitions from controlling threshold voltage through a single dimension (impurity concentration in channel layer) to multiple dimensions by adding dipole layers at interfaces. This dimensional expansion in the vertical stacking direction enables independent control of threshold voltage without changing the horizontal channel dimensions, thus maintaining integration density while improving threshold voltage control precision.
2Adaptability or versatility
If the concentration of impurities in channel layers is adjusted to achieve multiple threshold voltages, then device specification variety is improved, but the manufacturing complexity increases due to dimensional shrinkage
Solution Approach 1:
The patent applies preliminary action by forming dipole layers and diffusion barrier layers before final channel layer formation. The dipole layers are pre-positioned at interfaces to establish predetermined electric field configurations, and diffusion barrier layers are pre-formed to control subsequent impurity diffusion. This preliminary structuring simplifies the overall manufacturing process by establishing threshold voltage characteristics early in the fabrication sequence rather than requiring complex post-processing adjustments.
Solution Approach 2:
The patent introduces dipole layers as intermediary elements between the gate electrode and channel layer. These dipole layers act as mediators that modify the electric field distribution and impurity concentration profiles without requiring direct modification of the channel layer itself. This intermediary approach enables threshold voltage control while maintaining simpler manufacturing processes, as the dipole layers can be deposited using standard thin-film techniques rather than requiring complex ion implantation or diffusion processes.
3Length of moving object
If the work function metal layer thickness is reduced to fit dimensional constraints, then device miniaturization is improved, but the threshold voltage becomes relatively low
Solution Approach 1:
The patent applies parameter changes by introducing dipole moments through oriented dipole layers rather than changing the physical thickness of the work function metal layer. By adjusting the dipole moment magnitude and orientation in these intermediary layers, the effective threshold voltage can be tuned independently of the work function metal layer thickness. This parameter substitution enables maintaining thin metal layers for miniaturization while achieving desired threshold voltage values through electromagnetic field control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of semiconductor devices with different threshold voltages while maintaining the same work function metal layer thickness, effectively addressing the challenge of dimensional shrinkage and impurity control, thereby improving the performance of transistors in advanced technology nodes.
Implementation Method 1
forming a diffusion barrier layer and dipole elements to adjust the impurity concentration in the interfacial layers
Implementation Method 2
adjusting a dipole moment of the at least one dipole layer to adjust a threshold voltage of the GAA device
Data Source
AI summary
A semiconductor structure includes a plurality of semiconductor devices, each of which includes at least one channel layer, at least one interfacial layer, a gate dielectric layer, a gate electrode, and dipole elements. The at least one interfacial layer is disposed on the at least one channel layer. The gate dielectric layer is disposed over the at least one interfacial layer such that the at least one channel layer is separated from the gate dielectric layer through the at least one interfacial layer. The gate electrode is disposed on the gate dielectric layer. The dipole elements are present in the interfacial layer of at least one of the semiconductor devices in a predetermined amount such that the at least one of the semiconductor devices has a tunability of threshold voltage from that of the other of the semiconductor devices. Methods for manufacturing the semiconductor structure are also disclosed.