GAA Transistor Structure With Dielectric Isolation for Leakage Suppression
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Solution Overview
Problem
Conventional methods for fabricating gate-all-around (GAA) transistors face challenges in suppressing leakage current due to the gate structure engaging the top surface of the semiconductor substrate, which complicates the integration of stacked channel structures in advanced semiconductor devices.
Innovation Solution
The introduction of an insulating dielectric layer interposed between the source/drain features and the semiconductor substrate, along with the formation of an air gap, to isolate the epitaxial S/D features and reduce leakage current by limiting direct contact with the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate structure extending around the bottommost channel structure is formed in conventional GAA process, then gate control is improved, but leakage current under the stacked channel structures increases
Solution Approach 1:
An insulating dielectric layer is introduced as an intermediary between the gate structure and the semiconductor substrate. This dielectric layer physically separates the gate structure from direct contact with the substrate, thereby suppressing leakage current while preserving the gate-all-around structure's control capability over the channel
Solution Approach 2:
The gate structure is segmented into two distinct parts: a first gate structure portion that contacts the channel structure for control, and a second gate structure portion that is separated from the substrate by the insulating dielectric layer. This segmentation allows the gate to maintain control functionality while eliminating the leakage path to the substrate
2Ease of manufacture
If the gate structure directly engages the top surface of the semiconductor substrate, then fabrication is simplified, but leakage current suppression becomes difficult
Solution Approach 1:
The insulating dielectric layer serves as a mediator that can be integrated into existing fabrication processes. It provides a straightforward method to prevent direct gate-substrate contact without requiring complex process modifications, thus maintaining ease of manufacture while suppressing leakage
3Productivity
If stacked channel structures are integrated in GAA transistors, then device density is improved, but leakage current under the channels increases
Solution Approach 1:
The insulating dielectric layer is positioned beneath the stacked channel structures to provide a leakage barrier. This allows the high-density stacked configuration to be maintained while the dielectric prevents leakage current from flowing under the channels to the substrate
Data Source
AI summary
A semiconductor device includes a fin-shape base protruding from a substrate, channel structures suspended above the fin-shape base, a gate structure wrapping around each of the channel structures, a source/drain (S/D) epitaxial feature abutting the channel structures and directly above a top surface of the fin-shape base, inner spacers interposing the S/D epitaxial feature and the gate structure, and a dielectric layer disposed vertically between the top surface of the fin-shape base and a bottom surface of the S/D epitaxial feature.